# Kiến trúc phần mềm Radio P9

Chia sẻ: Tien Van Van | Ngày: | Loại File: PDF | Số trang:23

0
64
lượt xem
8

## Kiến trúc phần mềm Radio P9

Mô tả tài liệu

ADC and DAC Tradeoffs This chapter introduces the relationship between ADCs, DACs, and software radios. Uniform sampling is the process of estimating signal amplitude once each T seconds, sampling at a consistent frequency of fs = 1=T Hz. Although s s there are other types of sampling, SDRs employ uniform-sampling ADCs.

Chủ đề:

Bình luận(0)

Lưu

## Nội dung Text: Kiến trúc phần mềm Radio P9

3. REVIEW OF ADC FUNDAMENTALS 291 Figure 9-2 Anti-aliasing filters suppress aliased components. Figure 9-3 High resolution requires high stop band attenuation. nal, as illustrated in Figure 9-2. The wideband ADC, therefore, is preceded by anti-aliasing filter(s) that shape the analog spectrum to avoid aliasing. This requires anti-aliasing filters with sufficient stop-band attenuation. Figure 9-3 shows the stop-band attenuation required for a given number of bits of dy- namic range. Since the instantaneous dynamic range cannot exceed the reso- lution of the ADC, the number of bits of resolution is a limiting measure of the dynamic range. High dynamic range requires high stop-band attenuation. To reduce the power of out-of-band energy to less than 1 LSB, the stop- 2 band attenuation of the anti-aliasing filter of a 16-bit ADC must be #102 dB. This includes the contributions of all cascaded filters including the final anti- aliasing filter. To suppress frequency components that are close to the upper band-edge of the ADC passband, the anti-aliasing filters require a large shape factor. The shape factor is the ratio of the frequency at which #80 dB attenuation is achieved versus the frequency of the #3 dB point. Bessel filters have high shape factors and thus slow rolloff, but they are monotonic. Monotonic fil- ters exhibit increased attenuation as frequency increases. Nonmonotonic filters have decreased-attenuation zones. These admit increased out-of-band energy and distort phase. Those filters with fastest rolloff also have high amplitude ripple and distort phase more than filters with more modest rolloff. Filter de- sign has received much attention in the signal-processing literature [278]. (See Figure 9-4.)
4. 292 ADC AND DAC TRADEOFFS Figure 9-4 Attenuation rolloff, amplitude ripple, and shape factor determine anti- aliasing filter suitability. Figure 9-5 Sample-and-hold circuits limit ADC performance. C. Clipping Distortion In most applications, one cannot control the energy level of the maximum signal to be exactly equal to the most significant bit. One must therefore allow for some AGC or for some peak power mismatch. Clipping of the peak energy level introduces frequency domain sidelobes of the high power signal. These sidelobes have the general structure of the convolution of the signal’s sinusoidal components with the Fourier transform of a square wave, which has the form of a sin(x)=x function. Frequency domain sidelobes have a power level of #11 dB, which is clearly unacceptable interference with other signals in a wideband passband. In practice, avoiding clipping may occupy the entire most significant bit (MSB). Usable dynamic range may therefore be one or two bits less than the ADCs resolution. D. Aperture Jitter Sample-and-hold circuits also limit ADC performance as illustrated in Fig- ure 9-5. Consider a sinusoidal input signal, V(t) = A cos(!t), where ! is the
5. REVIEW OF ADC FUNDAMENTALS 293 maximum frequency. The rate of change of voltage is as shown, yielding a maximum rate of change of 2A=(2B ) or A=(2(B+1) ). The time duration of this differential interval is inversely proportional to the frequency and the exponential of the number of bits in the ADC. This period is the aperture uncertainty, the shortest time taken for a maximal-frequency sine wave to traverse the LSB. The timing jitter must be a small fraction of the aperture uncertainty to keep the total error to less than 1 LSB. Therefore, the timing 2 jitter should be 10% or less of the uncertainty shown in the figure. An 8-bit ADC sampling at 50 MHz requires aperture jitter that is less than a picosecond (ps). This stability must be maintained for a period of time that is inversely pro- portional to the frequency stability that one requires. If, for example, the min- imum resolvable frequency component for the signal processing algorithms should be 1 kHz, then the timing accuracy over a 1 ms interval should be less than the aperture uncertainty. Short-term jitter can be controlled to less than 1 ps for 1 ms with current technology. If the spectral components should be accurate to 1 Hz, then the stability must be maintained for 1 second. Due to drift of timing circuits, such performance may be maintained for 109 to 1011 aperture periods, or on the order of 1 to 100 ms. Stability beyond these rela- tively short intervals is problematic due to drift induced by thermal changes, among other things. A sampling rate of 1 GHz with 12 bits of resolution requires about 2 fs of aperture jitter or less. This stability is beyond the cur- rent state of the art, which corresponds to 6.5 to 8 bits of resolution at these sampling rates. E. Quantization and Dynamic Range Quantization step size is related to power according to [279]: P = q2 =12R q where q is the quantization step size, and R is the input resistance. The SNR at the output of the ADC is SNR = 6:02 B + 1:76 + 10 log(fs =2fmax ) where B is the number of bits in the ADC, fs is the sampling frequency, and fmax is the maximum frequency component of the signal. For Nyquist sampling, fs = 2fmax , so the ratio of these quantities is unity. Since the log of unity is zero, the third term of the equation for SNR above is eliminated. The approximation for Nyquist sampling, then, is that the dynamic range with respect to noise equals 6 times the number of bits. This equation suggests that the SNR may be increased by increasing the sampling rate be- yond the Nyquist rate. This is the principle behind the sigma-delta/delta-sigma ADC.
6. 294 ADC AND DAC TRADEOFFS Figure 9-6 Walden’s analysis of ADC technology. F. Technology Limits The relationship between ADC performance and technology parameters has been studied in depth by Walden [280, 281]. His analysis addresses the elec- tronic parameters, aperture jitter, thermal effects, and conversion-ambiguity. These are related to specific devices in Figure 9-6. The physical limits of ADCs are bounded by Heisenberg’s uncertainty principle. This core phys- ical limit suggests that one could implement a 1 GHz ADC with 20 bits (120 dB) of dynamic range. To accomplish this, one must overcome thermal, aperture jitter, and conversion ambiguity limits. Thermal limits may yield to research in Josephson Junction or high-temperature superconductivity (HTSC) research. For example, Hypress has demonstrated a 500 Msa/sec (200 MHz) ADC with dynamic range of 80 dB operating at 4K [435]. Walden notes that advances in ADC technology have been limited. During the last eight years, SNR has improved only 1.5 bits. Substantial investments are required for continued progress. DARPA’s Ultracomm program, for example, funded research to realize a 16-bit $100 MHz ADC by 2002 [282]. Commercial re- search continues as well, with Analog Devices’ announcement of the AD6644, a 14-bit$ 72 MHz ADC consuming only 1.2 W [282]. II. ADC AND DAC TRADEOFFS The previous section characterized the Nyquist ADC. This section provides an overview of important alternatives to the Nyquist ADC, emphasizing