Mainboard via 630cfr3

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Mainboard via 630cfr3

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Nội dung Text: Mainboard via 630cfr3

  1. VTT VTT R84 AK30 VCC2DET VCCCORE 630CF REV:3.0 VCC3 SLEWCTRL Layout all Bead 0805-->0603 CPURST# OPEN-220 RTTCTRL VTT VCC2.5 VCC_CMOS VCC3 U5 M E N DOCINO_2 AA37 A37 AH20 AC37 AN11 AN13 AN15 AN21 AN23 AA33 AA35 AK16 AK24 AK30 VCC_CORE GND AL11 AL13 AL21 AH4 AC1 G35 G37 Q33 Q35 Q37 U4 AA5 AB32 VCC2.5 AF4 C29 C31 C33 N33 N35 N37 U35 U37 A29 A31 A33 B36 E23 E29 E31 S33 S37 E21 E27 S35 F10 L33 W3 V4 X6 Y1 X2 R2 R414 AB2 VCC_CORE GND AC33 C15 1K AB34 VCC_CORE GND AC5 RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED NC-18P W35 AD36 AD32 VCC_CORE GND AD2 TESTHI VCC_1.5V VCC_CORE GND BC5 C37 Z36 AE5 AD34 CPUPRES# VCC_2.5V AB36 AF2 VCC_CORE GND AF32 VCC_CMOS AF34 VCC_CORE GND AF36 1nF G33 AH24 VCC_CORE GND AG5 DXP AL31 BP#[2] E37 AH32 VCC_CORE GND AH2 23,26 DXP DXN THERMDP BP#[3] VCC_CORE GND AL29 C35 AH36 AH34 23,26 DXN THERMDN BPM#[0] R411 VCC_CORE GND MENDOCINO AH28 E35 JP11 1K AJ13 AJ11 THERMTRIP# BPM#[1] AJ33 BSEL0# AJ17 VCC_CORE GND AJ15 BSEL# 1 2 FS0 8 VCC_CORE GND 370CPUCLK W37 AJ21 AJ19 8 370CPUCLK HLOCK# AK20 BCLK AE33 A20M# HEADER 2 AJ25 VCC_CORE GND AJ23 2,3 HLOCK# LOCK# A20M# A20M# 6 VCC_CORE GND DEFER# AN19 AC35 FERR# AJ29 AJ27 2,3 DEFER# 2,3 HTRDY# 2,3 CPURST# 2,3 BPRI# HTRDY# CPURST# BPRI# AN25 X4 AN17 DEFER# TRDY# RESET# BPRI# PPGA 370 FERR# FLUSH# IERR# IGNNE# AE37 AE35 AG37 FLUSH# IGNNE# FERR# IGNNE# 6 6 AJ5 AJ9 AK2 VCC_CORE VCC_CORE VCC_CORE VCC_CORE GND GND GND GND AJ3 AJ7 AK36 VID4 VID4 20 BREQ0# AN29 AG33 INIT# AK34 AK4 2,3 BREQ0# BREQ0# INIT# INIT# 6 VCC_CORE GND RS#2 AK28 M36 INTR AM12 AL1 2,3 RS#2 RS#[2] LINT[0]/INTR INTR 6 VCC_CORE GND RS#1 AH22 L37 NMI AM16 AL3 2,3 RS#1 RS#[1] LINT[1]/NMI NMI 6 VCC_CORE GND RS#0 AH26 AH30 SLP# AM20 AM10 2,3 RS#0 RS#[0] SLP# CPUSLP# 6 VCC_CORE GND AJ35 SMI# AM24 AM14 SMI# SMI# 6 VCC_CORE GND ADS# AN31 AG35 STPCLK# AM28 AM18 2,3 ADS# ADS# STPCLK# STPCLK# 6 VCC_CORE GND HITM# AL23 AM32 AM2 2,3 HITM# HITM# VCC_CORE GND HIT# AL25 AM4 AM22 2,3 HIT# HIT# VCC_CORE GND DRDY# AN27 J33 PICCLK AM8 AM26 2,3 DRDY# DRDY# PICCLK PICCLK 8 VCC_CORE GND DBSY# AL27 B10 AM30 2,3 DBSY# BNR# AH14 DBSY# VID3 VID2 VID1 VID0 VCC_CORE J35 PICD0 B14 VCC_CORE GND AM34 2,3 BNR# HREQ#4 BNR# PICD[0] PICD1 VCC_CORE GND AL17 L35 B18 AM6 HREQ#3 AL19 REQ#[4] 1 1 1 1 1.30 PICD[1] B22 VCC_CORE GND AN3 HREQ#2 AH18 REQ#[3] B26 VCC_CORE GND B12 HREQ#1 AH16 REQ#[2] 1 1 1 0 1.35 AK26 PWRGOOD B30 VCC_CORE GND B16 |LINK REQ#[1] PWRGOOD PWRGOOD 20 VCC_CORE GND HREQ#0 AK18 B34 B20 |2.SCH REQ#[0] 1 1 0 1 1.40 VCC_CORE GND |3.SCH B6 B24 HA#31 AD4 A35 PRDY# C3 VCC_CORE GND B28 |4.SCH A#[31] PRDY# PRDY# 2 VCC_CORE GND HA#30 AA3 1 1 0 0 1.45 J37 PREQ# D20 B32 |5.SCH HA#29 Z4 A#[30] PREQ# AL33 HTCK D24 VCC_CORE GND B4 |6.SCH HA#28 AK6 A#[29] 1 0 1 1 1.50 TCK AN35 HTDI D28 VCC_CORE GND B8 |7.SCH HA#27 A#[28] TDI HTDO VCC_CORE GND |8.SCH AA1 AN37 D32 D18 HA#26 Y3 A#[27] 1 0 1 0 1.55 TDO AK32 HTMS D36 VCC_CORE GND D2 |9.SCH HA#25 AF6 A#[26] TMS AN33 HTRST# D6 VCC_CORE GND D22 |10.SCH HA#24 AB4 A#[25] 1 0 0 1 1.60 TRST# E13 VCC_CORE GND D26 |11.SCH HA#23 AB6 A#[24] E17 VCC_CORE GND D30 |12.SCH HA#22 A#[23] 1 0 0 0 1.65 VCC_CORE GND |13.SCH AE3 E5 D34 HA#21 AJ1 A#[22] AJ37 VID3 E9 VCC_CORE GND D4 |14.SCH HA#20 AC3 A#[21] 0 1 1 1 1.70 VID[3] AL37 VID2 F14 VCC_CORE GND E11 |15.SCH HA#19 AG3 A#[20] VID[2] AM36 VID1 F2 VCC_CORE GND E15 |16.SCH HA#18 Z6 A#[19] 0 1 1 0 1.75 VID[1] AL35 VID0 F22 VCC_CORE GND E19 |17.SCH HA#17 A#[18] VID[0] VCC_CORE GND |18.SCH AE1 F26 E7 HA#16 AN7 A#[17] 0 1 0 1 1.80 F30 VCC_CORE GND F20 |19.SCH HA#15 AL5 A#[16] AK22 F34 VCC_CORE GND F24 |20.SCH A#[15] VREF7 CPUVREF VCC_CORE GND HA#14 AK14 0 1 0 0 1.85 AK12 F4 F28 |21.SCH HA#13 AL7 A#[14] VREF6 AD6 H32 VCC_CORE GND F32 |22.SCH HA#12 A#[13] 0 0 1 1 1.90 VREF5 VCC_CORE GND |23.SCH AN5 V6 H36 F36 HA#11 AK10 A#[12] VREF4 R6 J5 VCC_CORE GND G5 |24.SCH HA#10 AH6 A#[11] 0 0 1 0 1.95 VREF3 K4 K2 VCC_CORE GND H2 |25.SCH A#[10] VREF2 VCC_CORE GND PPGA HA#9 AL9 F18 K32 H34 |26.SCH HA#8 AH10 A#[9] 0 0 0 1 2.00 VREF1 E33 VCCCORE K34 VCC_CORE GND K36 HA#7 A#[8] VREF0 VCC_CORE GND AL15 M32 L5 HA#6 AN9 A#[7] 0 0 0 0 2.05 N5 VCC_CORE GND M2 HA#5 AH8 A#[6] AG1 EDGCTRL R80 P2 VCC_CORE GND M34 HA#4 AH12 A#[5] EDGCTRL P34 VCC_CORE GND P32 A#[4] 51 VCC_CORE GND HA#3 AK8 L20 R32 P36 A#[3] PLL1 VCC_CORE GND W33 1 2 R36 Q5 PLL1 U33 PLL2 S5 VCC_CORE GND R34 2 2 U H-SMT-CPU PLL2 T2 VCC_CORE GND T32 BC40 T34 VCC_CORE GND T36 + 2 2 U F-SMT-CPU VCC3 V32 VCC_CORE GND U5 VCC_CORE GND VCC2.5 V36 V2 VCC_CORE GND D#63 D#62 D#61 D#60 D#59 D#58 D#57 D#56 D#55 D#54 D#53 D#52 D#51 D#50 D#49 D#48 D#47 D#46 D#45 D#44 D#43 D#42 D#41 D#40 D#39 D#38 D#37 D#36 D#35 D#34 D#33 D#32 D#31 D#30 D#29 D#28 D#27 D#26 D#25 D#24 D#23 D#22 D#21 D#20 D#19 D#18 D#17 D#16 D#15 D#14 D#13 D#12 D#11 D#10 W5 V34 D#9 D#8 D#7 D#6 D#5 D#4 D#3 D#2 D#1 D#0 R415 X34 VCC_CORE GND X32 M E N DOCINO_1 1K Y35 VCC_CORE GND X36 R62 C17 C23 C27 C19 C21 D16 C25 C13 C11 D12 D14 C15 D10 E25 A27 A25 A19 A23 A13 A17 A15 A21 A11 F16 F12 W1 M4 M6 VCC_CORE GND A7 A9 B2 A3 A5 E1 E3 K6 P4 P6 S1 S3 G3 G1 Q1 Q3 D8 C9 C7 C1 C5 H6 R4 H4 U3 N3 U1 N1 F6 F8 T6 T4 L3 L1 J3 J1 Z32 Y37 VCC_CORE GND 150-1% Y5 GND Z2 AK30 GND Z34 GND HD#63 HD#62 HD#61 HD#60 HD#59 HD#58 HD#57 HD#56 HD#55 HD#54 HD#53 HD#52 HD#51 HD#50 HD#49 HD#48 HD#47 HD#46 HD#45 HD#44 HD#43 HD#42 HD#41 HD#40 HD#39 HD#38 HD#37 HD#36 HD#35 HD#34 HD#33 HD#32 HD#31 HD#30 HD#29 HD#28 HD#27 HD#26 HD#25 HD#24 HD#23 HD#22 HD#21 HD#20 HD#19 HD#18 HD#17 HD#16 HD#15 HD#14 HD#13 HD#12 HD#11 HD#10 HD#9 HD#8 HD#7 HD#6 HD#5 HD#4 HD#3 HD#2 HD#1 HD#0 JP10 AJ31 VTT R412 GND Y33 PLL1.25V 3 GND 2 FS1 8 C43 C44 1 R61 HEADER 3 1K R59 BSEL133/100# HD#[0..63] 75 1% CPUVREF HD#[0..63] 2,3 For Cu-256 PU_cmos=150 Ohm VCC_CMOS VCC_CMOS 4.7U .1U HA#[3..31] VCC_CMOS VCC_CMOS L19 HA#[3..31] 2,3 1.2V 1 2 HREQ#[0..4] 150-1% HREQ#[0..4] 2,3 A20M# R27 470 PICD0 R20 150 BC6 BC8 FB FERR# R26 330 PICD1 R21 150 .1U .1U R58 BC29 BC30 BC31 BC52 BC80 BC82 BC84 BC88 BC72 BC89 FLUSH# R28 510 IGNNE# PREQ# 150 1% 10uF 1nF 1nF 1nF 1nF 1nF 1nF 1nF 1nF R30 470 R19 330 F o r Future Compatibility Upgrate INIT# R32 470 HTCK R39 1K INTR R23 470 HTDI R38 330 NMI R22 470 HTDO R35 150 VCC_CMOS VCC_CMOS 0.1uF RTTCTRL R24 110 1% SLP# R33 330 HTMS R36 1K SLEWCTRL R60 110 1% SMI# R34 470 J E T W A Y I N F ORMATION STPCLK# R29 470 HTRST# R40 680 BC4 BC7 .1U .1U Title M E N D O C I N O PPGA CPU VID[0..4] VID[0..4] 20 Size D o c u m e n t Number Rev B J - 6 3 0 C F REV:3.0 3.0 @ FOR FSB=133MHZ Lmax=4.5 inches Date: S a t u r d a y , A u g u s t 11, 2001 Sheet 1 of 26
  2. VTT VTT Vtt>50mil RN4 BREQ0# 1 2 RN27 56-8P4RS VTT VTT VTT VTT VTT 1,3 BREQ0# RS#2 3 4 HD#13 2 1 VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE 1,3 RS#2 DRDY# 5 6 HD#11 4 3 1,3 DRDY# DBSY# 56-8P4RS HD#14 7 8 6 5 1,3 DBSY# 1 2 HD#2 8 7 3 4 HD#30 2 1 BC16 BC94 BC90 BC102 BC95 PRDY# 5 6 56-8P4RS HD#7 4 3 BC32 BC34 BC38 BC41 BC42 BC43 .1U .1U .1U .1U .1U 1 PRDY# ADS# 7 8 HD#3 6 5 .1U .1U .1U .1U .1U .1U 1,3 ADS# HD#20 8 7 RN3 RN26 56-8P4RS RN19 RN25 56-8P4RS VTT VTT VTT RS#1 1 2 HD#24 2 1 VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE 1,3 RS#1 HLOCK# HD#23 3 4 4 3 1,3 HLOCK# HREQ#3 5 6 HD#21 6 5 56-8P4RS DEFER# 7 8 HD#16 8 7 1,3 DEFER# RS#0 1 2 HD#33 2 1 BC48 BC112 BC75 1,3 RS#0 HTRDY# 3 4 HD#19 4 3 BC73 BC74 BC50 BC54 BC51 BC53 1,3 HTRDY# 56-8P4RS 1U .1U 1U HIT# 5 6 HD#25 6 5 .1U .1U .1U .1U .1U .1U 1,3 HIT# HITM# 7 8 HD#26 8 7 1,3 HITM# RN18 RN24 56-8P4RS VTT RN38 VTT VTT VTT VTT HREQ#1 1 2 VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE HA#7 3 4 HA#14 5 6 56-8P4RS BNR# 7 8 C63 1,3 BNR# HREQ#0 1 2 RN23 56-8P4RS BC109 BC100 BC76 BC101 .1U HREQ#2 3 4 HD#31 2 1 BC58 BC77 BC79 BC83 BC85 BC87 .1U .1U .1U 1U BPRI# 5 6 56-8P4RS HD#29 4 3 .1U .1U .1U .1U .1U .1U 1,3 BPRI# HREQ#4 7 8 HD#32 6 5 HD#35 8 7 RN20 HD#43 2 1 RN36 HD#34 4 3 VTT VTT VTT VTT VTT HA#13 2 1 HD#22 6 5 HA#16 4 3 HD#28 8 7 VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE HA#3 6 5 HA#9 8 7 56-8P4RS RN22 56-8P4RS HA#6 2 1 RN17 56-8P4RS BC110 BC104 BC49 BC27 BC17 HA#8 4 3 56-8P4RS HD#39 2 1 1U .1U .1U .1U .1U HA#11 6 5 HD#37 4 3 BC60 BC63 BC65 BC66 BC61 HA#4 8 7 HD#36 6 5 .1U .1U .1U .1U .1U HD#38 8 7 RN37 HD#42 2 1 HA#19 2 1 HD#27 4 3 VTT VTT VTT VTT HA#25 4 3 RN34 HD#44 6 5 HA#21 6 5 HD#45 8 7 HA#10 8 7 56-8P4RS VCCCORE VCCCORE VTT VCCCORE HA#28 2 1 RN16 56-8P4RS HA#15 4 3 RN15 56-8P4RS BC105 BC28 BC108 BC106 HA#5 6 5 HD#47 2 1 1U .1U .1U .1U HA#12 8 7 HD#41 4 3 HD#49 6 5 BC36 BC44 BC70 BC71 RN35 56-8P4RS HD#51 8 7 4.7U 4.7U 4.7U 4.7U HD#59 2 1 RN32 56-8P4RS HD#48 4 3 HA#27 2 1 HD#52 6 5 HA#30 4 3 HD#40 8 7 VTT VTT HA#24 6 5 HA#20 8 7 RN11 56-8P4RS VCCCORE VCCCORE VCCCORE VCCCORE HA#31 2 1 RN10 56-8P4RS HA#17 4 3 HD#54 2 1 HA#22 6 5 HD#63 4 3 BC202 BC203 HA#23 8 7 HD#57 6 5 .1U .1U HD#55 8 7 BC33 BC55 BC81 BC86 RN33 56-8P4RS HD#62 2 1 4.7U 4.7U 4.7U 4.7U RN30 56-8P4RS HD#58 4 3 HD#4 2 1 HD#53 6 5 HD#15 4 3 HD#46 8 7 HD#1 6 5 HD#0 8 7 RN9 56-8P4RS CPURST# 2 1 VCCCORE VCCCORE VCCCORE VCCCORE 1,3 CPURST# HA#18 4 3 HD#56 2 1 HA#26 6 5 HD#61 4 3 HA#29 8 7 HD#50 6 5 HD#60 8 7 RN31 56-8P4RS BC59 BC62 BC64 BC67 RN28 56-8P4RS RN6 56-8P4RS 4.7U 4.7U 4.7U 4.7U HD#9 2 1 HD#18 4 3 HD#12 6 5 HD#10 8 7 HD#17 2 1 HD#8 4 3 HD#5 6 5 VCCCORE VCCCORE VCCCORE VCCCORE HD#[0..63] HD#6 8 7 SCOKET 370 RT 1,3 HD#[0..63] RN29 56-8P4RS HA#[3..31] 1,3 HA#[3..31] BC35 BC37 BC39 BC56 HREQ#[0..4] .1U .1U .1U .1U 1,3 HREQ#[0..4] N O T E : GTL+ TERMINATION RESISTORS ONLY FOR MENDOCINO PPGA PROCESSOR. VCCCORE VCCCORE VCCCORE VCCCORE J E T W A Y I N F ORMATION BC68 BC57 BC69 BC78 Title .1U 10U/1206 10U/1206 .1U G T L + T E R M I N A T I O N R ESISTORS Size D o c u m e n t Number Rev B J - 6 3 0 C F REV:3.0 3.0 Date: S a t u r d a y , A u g u s t 11, 2001 Sheet 2 of 26
  3. VTT VTT VTT CLOSE TO SIS630E VTTA MD[0..63] MD[0..63] 7,19 R93 C65 56 1u-0805 CSA#[0..3] CSA#[0..3] 7 R113 R91 75 1% 75 1% CSB#[0..3] CSB#[0..3] 7 ADS# 1,2 ADS# MA[0..14] MA[0..14] 7 1.2V 1.2V GTLREFA DQM[0..7] DQM[0..7] 7 MD63 MD62 MD61 MD60 MD59 MD58 MD57 MD56 MD55 MD54 MD53 MD52 MD51 MD50 MD49 MD48 MD47 MD46 MD45 MD44 MD43 MD42 MD41 MD40 MD39 MD38 MD37 MD36 MD35 MD34 MD33 MD32 MD31 MD30 MD29 MD28 MD27 MD26 MD25 MD24 MD23 MD22 MD21 MD20 MD19 MD18 MD17 MD16 MD15 MD14 MD13 MD12 MD11 MD10 MD9 MD8 MD7 MD6 MD5 MD4 MD3 MD2 MD1 MD0 R114 BC115 R92 BC107 150 1% 150 1% 0.001uF 0.001uF VSSREFA AG21 AG18 AG17 AG22 AG20 AG19 AG16 AC28 AC26 AD28 AD26 AH22 AD20 AD18 AH19 AH16 AC29 AC27 AD29 AD27 AD25 AH21 AH20 AH18 AH17 AA27 AB28 AA25 AB25 AB24 AE19 AE18 AE17 AA29 AA28 AA26 AB29 AB27 AB26 AE20 AF20 AF16 AF21 AF19 AF18 AF17 AJ21 AJ20 AJ18 AJ22 AJ19 AJ17 W28 W25 W29 W27 W26 U10 R29 N29 P29 V24 Y29 Y27 Y25 Y24 Y28 Y26 GTLREFA VTTA MD63 MD62 MD61 MD60 MD59 MD58 MD57 MD56 MD55 MD54 MD53 MD52 MD51 MD50 MD49 MD48 MD47 MD46 MD45 MD44 MD43 MD42 MD41 MD40 MD39 MD38 MD37 MD36 MD35 MD34 MD33 MD32 MD31 MD30 MD29 MD28 MD27 MD26 MD25 MD24 MD23 MD22 MD21 MD20 MD19 MD18 MD17 MD16 MD15 MD14 MD13 MD12 MD11 MD10 MD9 MD8 MD7 MD6 MD5 MD4 MD3 MD2 MD1 MD0 VSSQ VTTB A23 GTLREFB VTTB A24 VSSREFB B24 GTLREFB AE23 C78 VSSQ CSA#[5] AD22 10P CSA#[4] RN46 AJ24 CAS3 CAS0 1 2 CSA#0 CSA#[3] AH24 CAS2 CAS1 3 4 CSA#1 630CCLK CSA#[2] CAS1 CAS2 CSA#2 A18 AG24 5 6 8 630CCLK CPUCLK CSA#[1] HLOCK# T26 AF24 CAS0 CAS3 7 8 CSA#3 1,2 HLOCK# HLOCK# CSA#[0] DEFER# T27 1,2 DEFER# HTRDY# T24 DEFER# AF27 10X4 1,2 HTRDY# CPURST# M24 HTRDY# CSB#[5] AF28 1,2 CPURST# BPRI# CPURST# CSB#[4] CSB3 CSB#3 R26 AC25 1 2 1,2 BPRI# BPRI# CSB#[3] BREQ0# J26 AF29 CSB2 RN42 3 4 CSB#2 1,2 1,2 1,2 1,2 BREQ0# RS#2 RS#1 RS#0 RS#2 RS#1 RS#0 V27 V26 U27 BREQ0# RS#[2] RS#[1] RS#[0] MEMORY CSB#[2] CSB#[1] CSB#[0] MA[14] AE25 AE26 AF26 CSB1 CSB0 MAA14 10X4 R95 5 7 10 6 8 CSB#1 CSB#0 MA14 ADS# V28 AG29 MAA13 R96 10 MA13 HITM# U26 ADS# MA[13] AG28 MAA12 R94 10 MA12 1,2 HITM# HIT# V25 HITM# MA[12] AG27 MAA11 1 2 MA11 1,2 HIT# DRDY# HIT# MA[11] MAA10 MA10 U28 AH28 RN47 3 4 1,2 DRDY# DRDY# MA[10] DBSY# V29 AH27 MAA9 10X4 5 6 MA9 1,2 DBSY# DBSY# MA[9] BNR# R28 AJ27 MAA8 7 8 MA8 1,2 BNR# BNR# MA[8] AG26 MAA7 1 2 MA7 HREQ#4 T28 MA[7] AH26 MAA6 3 4 MA6 RN45 HREQ#3 HREQ#[4] MA[6] MAA5 MA5 U25 AJ26 10X4 5 6 HREQ#2 U29 HREQ#[3] MA[5] AF25 MAA4 7 8 MA4 HREQ#1 T29 HREQ#[2] MA[4] AG25 MAA3 1 2 MA3 HREQ#0 R27 HREQ#[1] MA[3] AH25 MAA2 3 4 MA2 RN48 HREQ#[0] MA[2] AJ25 MAA1 5 6 MA1 10X4 HA#31 MA[1] MAA0 MA0 K25 630-1 AE24 7 8 HA#30 J28 HA#[31] MA[0] HA#[30] RN39 HA#29 J27 HA#28 K27 HA#[29] AE29 DQMA7 DQMA3 1 10X4 2 DQM3 HA#27 K26 HA#[28] DQM[7] AE27 DQMA6 DQMA7 3 4 DQM7 HA#26 HA#[27] DQM[6] DQMA5 DQMA2 DQM2 J29 AH23 5 6 HA#25 L26 HA#[26] DQM[5] AE22 DQMA4 DQMA6 7 8 DQM6 HA#24 M25 HA#[25] DQM[4] AD24 DQMA3 DQMA1 1 2 DQM1 HA#23 K29 HA#[24] DQM[3] AE28 DQMA2 DQMA5 3 4 DQM5 HA#22 N25 HA#[23] DQM[2] AG23 DQMA1 DQMA0 5 6 DQM0 HA#21 HA#[22] DQM[1] DQMA0 DQMA4 DQM4 P24 AJ23 7 8 HA#20 K28 HA#[21] DQM[0] HA#[20] RN49 HA#19 L27 HA#[19] 10X4 HA#18 L29 HA#17 M26 HA#[18] AF22 R128 10 RAMW# HA#[17] WE# RAMW# 7 HA#16 P25 HA#15 L28 HA#[16] HA#14 R25 HA#[15] AF23 R115 10 SRAS# HA#[14] SRAS# SRAS# 7 HA#13 M28 AE21 R129 10 SCAS# SCAS# 7 HA#12 HA#11 HA#10 HA#9 HA#8 M29 M27 R24 P26 N26 HA#[13] HA#[12] HA#[11] HA#[10] HA#[9] HA#[8] HOST SCAS# SDCLK AJ15 630SDCLK 630SDCLK 8 HA#7 N27 HA#6 HA#[7] 630CKE P27 F6 HA#[6] CKE 630CKE 21,22 HA#5 N28 HA#4 P28 HA#[5] VCC3 HA#3 T25 HA#[4] HA#[3] C83 OPEN BC148 CPUAVDD + SDVADD 1 5 00U/6.3DE HD#63 HD#62 HD#61 HD#60 HD#59 HD#58 HD#57 HD#56 HD#55 HD#54 HD#53 HD#52 HD#51 HD#50 HD#49 HD#48 HD#47 HD#46 HD#45 HD#44 HD#43 HD#42 HD#41 HD#40 HD#39 HD#38 HD#37 HD#36 HD#35 HD#34 HD#33 HD#32 HD#31 HD#30 HD#29 HD#28 HD#27 HD#26 HD#25 HD#24 HD#23 HD#22 HD#21 HD#20 HD#19 HD#18 HD#17 HD#16 HD#15 HD#14 HD#13 HD#12 HD#11 HD#10 HD#9 HD#8 HD#7 HD#6 HD#5 HD#4 HD#3 HD#2 HD#1 HD#0 VCC3 630-1 VCC3 AJ16 G26 G25 G28 G27 G29 D20 C22 C21 C23 D21 C24 D22 D24 C25 D23 D26 D25 C26 C27 C29 C28 D27 D28 D29 H24 H25 H26 H27 H29 H28 A19 E19 A21 E20 B22 B21 E21 A22 B23 E22 E24 E23 B25 A26 E25 A25 B26 B27 B28 A27 E26 E28 E27 E29 K24 F20 F22 F24 F27 F25 F29 F26 F28 L25 J25 R124 CPUAVDD SDAVDD R125 0 0 HD#63 HD#62 HD#61 HD#60 HD#59 HD#58 HD#57 HD#56 HD#55 HD#54 HD#53 HD#52 HD#51 HD#50 HD#49 HD#48 HD#47 HD#46 HD#45 HD#44 HD#43 HD#42 HD#41 HD#40 HD#39 HD#38 HD#37 HD#36 HD#35 HD#34 HD#33 HD#32 HD#31 HD#30 HD#29 HD#28 HD#27 HD#26 HD#25 HD#24 HD#23 HD#22 HD#21 HD#20 HD#19 HD#18 HD#17 HD#16 HD#15 HD#14 HD#13 HD#12 HD#11 HD#10 HD#9 HD#8 HD#7 HD#6 HD#5 HD#4 HD#3 HD#2 HD#1 HD#0 BC117 + BC118 BC119 10uF 0.1uF 0.001uF BC121 BC123 BC125 + 0.001uF 0.1uF 10uF J E T W A Y I N F ORMATION HD#[0..63] Title HD#[0..63] 1,2 6 3 0 - 1 ( H O S T/MEMORY) HA#[3..31] HA#[3..31] 1,2 Size D o c u m e n t Number Rev HREQ#[0..4] B J - 6 3 0 C F REV:3.0 3.0 HREQ#[0..4] 1,2 Date: S a t u r d a y , A u g u s t 11, 2001 Sheet 3 of 26
  4. VCC1.8V (FOR INTERNAL PLL) R126 AD[0..31] 13,14,15,23 AD[0..31] 0 + BC126 AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 BC122 BC124 10uF 0.001uF 0.1uF IDESAA[0..2] IDESAA[0..2] 15 I D ECS#A[0..1] I D ECS#A[0..1] 15 AH15 U12 D16 C16 C15 C14 C12 D12 C11 D11 C10 D10 B17 A17 E16 B16 A16 B15 E15 A15 A14 B14 E14 A11 E12 B11 B10 E11 E10 F15 F12 A9 B9 C9 AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 IDEAVDD PREQ#2 B18 AF8 ICHRDYA 14 PREQ#2 PREQ#[2] ICHRDYA ICHRDYA 15 PREQ#1 E17 AE11 IDEREQA 13,14 PREQ#1 PREQ#[1] IDREQ[A] IDEREQA 15 PREQ#0 C18 AD12 IDEIRQA 13,14 PREQ#0 PREQ#[0] IIRQA IDEIRQA 15 AE12 CBLIDA CBLIDA CBLIDA 15 AG8 IDEIOR#A IIOR#[A] IDEIOR#A 15 PGNT#2 F16 AE8 IDEIOW#A 14 PGNT#2 PGNT#[2] IIOW#[A] IDEIOW#A 15 PGNT#1 C17 AH8 IDACK#A IDACK#A 15 13,14,15,23 13,14,15,23 PGNT#1 13 PGNT#0 C/BE#[0..3] C/BE#[0..3] PGNT#0 D17 PGNT#[1] PGNT#[0] PCI IDACK#[A] IDSAA[2] IDSAA[1] AG9 AJ8 IDESAA2 IDESAA1 AF9 IDESAA0 C/BE#3 D15 IDSAA[0] C/BE#2 D14 C/BE#[3] AJ9 IDECS#A1 C/BE#1 E13 C/BE#[2] IDECSA#[1] AH9 IDECS#A0 C/BE#0 C/BE#[1] IDECSA#[0] A10 C/BE#[0] 13,14,15,23 13,14,15,23 13,14 13,14 INT#A INT#B INT#C INT#D INT#A INT#B INT#C INT#D K5 J5 J4 J3 INTA# INTB# INTC# INTD# 630-2 ICHRDYB IDREQ[B] IIRQB CBLIDB AG13 AE15 AF15 AD16 ICHRDYB IDEREQB IDEIRQB CBLIDB ICHRDYB IDEREQB IDEIRQB CBLIDB 15 15 15 15 FRAME# A13 13,14,15,23 FRAME# IRDY# F14 FRAME# AF13 IDEIOR#B 13,14 IRDY# IRDY# IIOR#[B] IDEIOR#B 15 TRDY# B13 AJ12 IDEIOW#B 13,14,15,23 TRDY# TRDY# IIOW#[B] IDEIOW#B 15 STOP# A12 AH13 IDACK#B 13,14,15,23 13,14 SERR# 13,14,15,23 PAR STOP# SERR# PAR L5 B12 STOP# SERR# PAR IDE IDACK#[B] IDSAB[2] IDSAB[1] AE16 AJ13 IDESAB2 IDESAB1 IDACK#B 15 DEVSEL# C13 AF14 IDESAB0 13,14 DEVSEL# PLOCK# DEVSEL# IDSAB[0] D13 13,14 PLOCK# PLOCK# AH14 IDECS#B1 630PCLK AJ14 IDECSB#[1] AG14 IDECS#B0 8 630PCLK PCIRST# E6 PCICLK IDECSB#[0] 13,14,15,23 PCIRST# PCIRST# R153 33 IDB10 IDB11 IDB12 IDB13 IDB14 IDB15 IDA10 IDA11 IDA12 IDA13 IDA14 IDA15 IDB0 IDB1 IDB2 IDB3 IDB4 IDB5 IDB6 IDB7 IDB8 IDB9 IDA0 IDA1 IDA2 IDA3 IDA4 IDA5 IDA6 IDA7 IDA8 IDA9 AG12 AG11 AG10 AH11 AH10 AD14 AD15 AH12 AD10 AE10 AE13 AE14 VCC3 630-2 AF12 AF10 AF11 AJ10 AJ11 AE6 AE5 AE7 AE9 AG7 AG6 AG5 AH7 AD6 AD8 AF5 AF7 AF6 AJ6 AJ7 U11 J13 M12 J14 OVDD RXAVSS M13 IDESAB[0..2] OVDD TXAVSS IDESAB[0..2] 15 J15 M14 OVDD OSC25VSS IDEDB0 IDEDB1 IDEDB2 IDEDB3 IDEDB4 IDEDB5 IDEDB6 IDEDB7 IDEDB8 IDEDB9 IDEDB10 IDEDB11 IDEDB12 IDEDB13 IDEDB14 IDEDB15 IDEDA0 IDEDA1 IDEDA2 IDEDA3 IDEDA4 IDEDA5 IDEDA6 IDEDA7 IDEDA8 IDEDA9 IDEDA10 IDEDA11 IDEDA12 IDEDA13 IDEDA14 IDEDA15 J16 M15 J17 OVDD VSS M16 I D ECS#B[0..1] OVDD VSS IDECS#B[0..1] 15 J18 M17 M9 OVDD VSS M18 M21 OVDD VSS N12 N9 OVDD VSS N13 N21 OVDD VSS N14 OVDD VSS IDEDA[0..15] P9 N15 OVDD VSS IDEDA[0..15] 15 P21 N16 R9 OVDD VSS N17 R21 OVDD VSS N18 IDEDB[0..15] OVDD VSS IDEDB[0..15] 15 T9 P12 OVDD VSS T21 P13 U9 OVDD VSS P14 OVDD VSS U21 V9 OVDD 630-3 VSS P15 P16 V21 OVDD VSS P17 OVDD VSS CHIPSET BYPASS CHIPSET BYPASS CAPACITOR AA12 P18 AA13 OVDD VSS R12 AA14 OVDD VSS R13 VCC1.8V VCC1.8V VCC1.8V VCC1.8V VCC1.8V VCC3 VCC1.8V VCC1.8V VCC1.8V VCC1.8V VCC3 AA15 OVDD VSS R14 AA16 OVDD VSS R15 OVDD VSS AA17 R16 AA18 OVDD VSS R17 BC130 BC131 BC132 BC133 BC134 BC145 BC208 BC209 BC300 BC301 BC306 OVDD VSS R18 .1US .01US .1US .01US .1US .01US 105P 105P 105P 105P NC VSS POWER H14 T12 H15 PVDD VSS T13 PVDD VSS H16 T14 N8 PVDD VSS T15 P8 PVDD VSS T16 P22 PVDD VSS T17 VCC3 VCCCORE VCC3 VCC3 VCCCORE VCC3 VCC1.8V VCC1.8V VCC1.8V VCC1.8V R8 PVDD VSS T18 PVDD VSS R22 U12 T8 PVDD VSS U13 T22 PVDD VSS U14 BC113 BC103 BC116 BC120 BC114 BC111 BC302 BC303 BC304 BC305 VCC1.8V AB14 PVDD VSS U15 .1US .01US .1US .01US .1US .01US 105P 105P 105P 105P AB15 PVDD VSS U16 PVDD VSS AB16 U17 PVDD VSS U18 VSS V12 J19 VSS V13 J20 IVDD VSS V14 IVDD VSS J21 V15 K21 IVDD VSS V16 L21 IVDD VSS V17 AA9 IVDD VSS V18 J E T W A Y I N F ORMATION AA10 IVDD VSS IVDD AA11 AA19 IVDD Title AA20 IVDD W21 6 3 0 - 2 , 6 3 0 - 3 ( P C I/IDE/PWR) AA21 IVDD IVDD W9 Y9 IVDD IVDD Y21 Size D o c u m e n t Number Rev IVDD IVDD B J - 6 3 0 C F REV:3.0 3.0 630-3 Date: S a t u r d a y , A u g u s t 11, 2001 Sheet 4 of 26
  5. W1 M4 M3 M2 M1 P2 P5 P1 V1 V2 V3 V4 N5 N4 N3 R4 R3 R2 R1 R6 R5 U1 U2 U3 U4 T1 T2 T3 T4 T5 T6 L1 VMD43/G2 VMD42/G3 VMD41/G1 VMD40/G0 VMD39/G5 VMD38/G4 VMD37/G6 VMD36/G7 VMD51/R2 VMD50/R1 VMD49/R0 VMD48/R3 VMD47/R4 VMD46/R5 VMD45/R6 VMD44/R7 VMD34/VBCTL0 VMD33/VBCTL1 VMD63 VMD62 VMD61 VMD60 VMD59/B7 VMD58/B6 VMD57/B5 VMD56/B4 VMD55/B3 VMD54/B2 VMD53/B1 VMD52/B0 VMD32/VBCAD VMD35/VBBLANKN U5 VBHSYNC/VMD31 Y1 VBVSYNC/VMD30 Y2 DDC2CLK/VMD29 Y3 DDC2DATA/VMD28 V5 W4 VMD27 Y4 VBA1/VBCLK VMD26 Y5 W2 VMD25 AA1 W3 VMA10/VBHCLK VMD24 W5 VMA11/VGCLK VMD23 AB1 P6 VMD22 AB2 VCS# VMD21 AB3 VMD20 AB4 ROUT AH5 VMD19 AB5 16 ROUT GOUT ROUT VMD18 AJ5 AC1 16 GOUT GOUT VMD17 BOUT AJ4 AC2 16 BOUT BOUT VMD16 Y6 RSET AG4 VMD15 AC3 630VREF AH4 RSET VMD14 AC4 COMP VREF VMD13 AF4 AC5 COMP VMD12 AD1 16 HSYNC 16 VSYNC HSYNC VSYNC R159 R158 33 33 AG2 AF3 AB6 HSYNC VSYNC SSYNC 630-4 VMD11 VMD10 VMD9 VMD8 VMD7 VMD6 AD2 AD3 AD4 AA5 AD5 AE1 VOSCI AG1 VMD5 AE2 8 VOSCI OSCI VGA/DFP VMD4 VMD3 AE3 AE4 DDC1DATA AG3 VMD2 AF1 16 DDC1DATA DDC1DATA VMD1 DDC1CLK AH2 AF2 16 DDC1CLK DDC1CLK VMD0 N2 VDQM7 N1 VDQM6 P4 ECLKAVDD AJ3 VDQM5 P3 ECLKAVDD VDQM4 V6 DCLKAVDD AH3 VDQM3 AA2 DCLKAVDD VDQM2 AA3 DACAVDD AH6 VDQM1 AA4 DACAVDD VDQM0 U6A 630-4 P L A CE THESE CIRCUITS CLOSE TO SiS 630 DACAVDD VCC3 VCC3 VCC3 BC141 L34 R173 L32 R175 L33 COMP 1 2 DCLKAVDD 1 2 ECLKAVDD 1 2 630VREF 1U-0805 FB 10 FB 10 FB RSET + BC142 + C119 + BC138 + C118 + BC140 + C120 R299 BC127 10uF .1U BC137 10uF 10uF BC136 10uF 10uF R161 0 0.1uF 0.1uF 0.1uF 140 1% R174 R162 0 0 J E T W A Y I N F ORMATION Title 6 3 0 - 4 (VGA/DFP) Size D o c u m e n t Number Rev B J - 6 3 0 C F REV:3.0 3.0 Date: S a t u r d a y , A u g u s t 11, 2001 Sheet 5 of 26
  6. U7A 630-5 LAD[0..3] LAD[0..3] 23 ENTEST AG15 M6 LAD0 ENTEST LAD0 LAD1 K1 LAD1 L4 LAD2 PSON# D1 LAD2 K2 LAD3 20,21 PSON# ACPILED D2 PSON# LAD3 19 ACPILED EXTSMI# F10 ACPILED M5 LDRQ# 19 EXTSMI# EXTSMI# LDRQ# LDRQ# 23 PWRBTN# E3 L3 LFRAME# 19 PWRBTN# PWRBTN# LFRAME# LFRAME# 23 26 RING RING PME# E4 E5 RING ACPI SIRQ L2 SIRQ SIRQ 23 13,14,23 PME# THERM# C8 PME# THERM# F18 NMI NMI NMI 1 D18 SMI# SMI# SMI# 1 KBDAT D3 C20 INTR 16 KBDAT KBDAT/GP10 INTR INTR 1 KBCLK D4 E18 A20M# 16 KBCLK KBCLK/GP11 A20M# A20M# 1 PMDAT C1 B19 INIT# 16 PMDAT PMDAT/GP12 INIT# INIT# 1 PMCLK C2 B20 IGNNE# 16 PMCLK PMCLK/GP13 IGNNE# IGNNE# 1 KBLOCK# C3 A20 FERR# 19 KBLOCK# KLOCK#/GP14 FERR# FERR# 1 C19 STPCLK# STPCLK# STPCLK# 1 D19 CPUSLP# CPUSLP# CPUSLP# 1 KBC J2 SMCLK SMCLK SMCLK 7,8,20 K4 SMBDAT SMBDAT SMBDAT 7,8,20 B2 SMBALT# GP15/SMBALT# F8 EEDI E7 GP3/EEDO D6 EECS C6 EESK D5 PLED0 GP8/PLED0/OC2# PLED0 18 C5 RXAVSS RXAVSS 630-5 R403 NC OC0# D8 17 OC0# OC1# E8 GP0/PREQ#3/OC0# J10 TPI+ 12,17 OC1# GP1/PGNT#3/OC1# TPI+ TPI+ 18 LDRQ1# A7 J9 TPI- GP2/LDRQ1#/OC3# TPI- TPI- 18 NC GPIO4 D7 J12 TPO+ R404 GP4 TPO+ TPO+ 18 GPIO5 C7 J11 TPO- GP5 TPO- TPO- 18 GPIO6 SPDIF B7 E9 GP6 LAN REXT A5 11 SPDIF GP7/SPDIF R148 R405 NC 10K 1% SPKR K3 10,19,23 SPKR SPK B5 SDATI1 OSC25MHI/CLK25M 10,12 SDATI1 SDATI0 B3 A3 AC_SDIN[1] Y2 25M M14 10,12 SDATI0 AC_SDIN[0] SDATO D9 10,12 SDATO SYNC A8 AC_SDOUT 10,12 SYNC AC_SYNC 10,12 AC_RESET# AC_RESET# BIT_CLK C4 B8 AC_RESET# AC '97 HRTXRXP B6 A6 10,12 BIT_CLK AC_BIT_CLK HRTXRXN AUX_OK G2 H5 UV0- 20 AUX_OK AUXOK UV0- UV0- 17 BATOK K6 G3 UV0+ 9 BATOK BATOK UV0+ UV0+ 17 PWRGD H3 H6 UV1- 20 PWRGD PWROK UV1- UV1- 17 G4 UV1+ UV1+ UV1+ 17 H2 G5 UV2- OSC32KHI UV2- UV2- 17 UV2+ H1 OSC32KHO RTC USB UV2+ F3 E2 UV3- UV2+ 17 R156 UV3- UV3- 17 F1 UV3+ UV3+ UV3+ 17 10M M13 M12 UV4- F4 F5 UV4- UV4+ UV4- 12 UV4+ UV4+ 12 Y3 J1 UCLK48M CLK48M UCLK48M 8 OVDDAUX 32.768K IVDDAUX RXAVDD USBVDD USBVDD RTCVDD RTCVSS TXAVDD 1 2 3 4 SB3V A4 B4 K9 E1 G1 H4 F2 L9 LPC PULL-HIGH VCC3 VCC3 VCC3 PLACE NEAR TO SPUER I/O VCC3 3.3V_TX BC129 C104 C103 BC135 BC128 C102 C112 RN63 10pF 10pF 0.1uF 0.1uF 0.1uF RTCVDD 0.1uF 10uF LAD0 2 1 LAD1 4 3 C86 C92 LAD2 6 5 VCC3 LAD3 8 7 0.1uF 1U-0805 SB3V 4.7KX4 R154 RN60 THERM# NEED NOT TO PLACE SMCLK 2 1 3.3V_RX NEAR TO SiS 630 SMBDAT 4 3 4.7k SIRQ 6 5 C101 C99 VCC3 LDRQ# 8 7 0.1uF 0.1uF 4.7KX4 DO NOT NEED TO PLACE C91 C89 RN54 NEAR TO SiS 630 GPIO4 7 8 AC'97 PULL-DOWN SB3V 0.1uF 1U-0805 GPIO5 5 6 PLACE NEAR TO AC'97 CODEC R147 LDRQ1# 3 4 RXAVSS GPIO6 1 2 PME# R155 4.7K SDATI1 R187 100K 0 4.7KX4 SMBALT# R140 4.7K SB1.8V SDATI0 R188 100K J E T W A Y I N F ORMATION SDATO R186 OPEN-100K R127 ENTEST SYNC R185 OPEN-100K C105 C106 C115 Title 4.7K 6 3 0 - 5 ( S O UTH BRIDGE) 0.1uF 560 22UF Size D o c u m e n t Number Rev B J - 6 3 0 C F REV:3.0 3.0 Date: S a t u r d a y , A u g u s t 11, 2001 Sheet 6 of 26
  7. MD[0..63] 3,19 MD[0..63] MA[0..14] 3 MA[0..14] DQM[0..7] 3 DQM[0..7] VCC3_DUAL VCC3_DUAL VCC3_DUAL VCC3_DUAL VCC3_DUAL VCC3_DUAL VCC3_DUAL VCC3_DUAL C46 C56 C68 C69 0.1U 0.1U 0.1U 0.1U DIMM1 DIMM2 102 110 124 133 143 157 168 102 110 124 133 143 157 168 R81 R82 18 26 40 41 49 59 73 84 90 18 26 40 41 49 59 73 84 90 6 6 8.2K 8.2K VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3_DUAL VCC3_DUAL VCC3_DUAL VCC3_DUAL MA0 33 147 MA0 33 147 MA1 117 A[0] REOE/NC 2 MD0 MA1 117 A[0] REOE/NC 2 MD0 C54 C58 C84 C94 MA2 34 A[1] DQ[0] 3 MD1 MA2 34 A[1] DQ[0] 3 MD1 0.1U 0.1U 0.1U 0.1U MA3 118 A[2] DQ[1] 4 MD2 MA3 118 A[2] DQ[1] 4 MD2 MA4 A[3] DQ[2] MD3 MA4 A[3] DQ[2] MD3 35 5 35 5 MA5 119 A[4] DQ[3] 7 MD4 MA5 119 A[4] DQ[3] 7 MD4 MA6 36 A[5] DQ[4] 8 MD5 MA6 36 A[5] DQ[4] 8 MD5 MA7 120 A[6] DQ[5] 9 MD6 MA7 120 A[6] DQ[5] 9 MD6 VCC3_DUAL VCC3_DUAL VCC3_DUAL VCC3_DUAL MA8 37 A[7] DQ[6] 10 MD7 MA8 37 A[7] DQ[6] 10 MD7 MA9 A[8] DQ[7] MA9 A[8] DQ[7] 121 164 121 164 MA10 38 A[9] NC 11 MD8 MA10 38 A[9] NC 11 MD8 MA13 123 A[10]/AP DQ[8] 13 MD9 MA13 123 A[10]/AP DQ[8] 13 MD9 C107 C67 C95 C85 MA14 126 A[11] DQ[9] 14 MD10 MA14 126 A[11] DQ[9] 14 MD10 0.1U 0.1U 0.1U 0.1U A[12] DQ[10] 15 MD11 A[12] DQ[10] 15 MD11 MA11 DQ[11] MD12 MA11 DQ[11] MD12 122 16 122 16 MA12 39 BA[0] DQ[12] 17 MD13 MA12 39 BA[0] DQ[12] 17 MD13 132 BA[1] DQ[13] 19 MD14 132 BA[1] DQ[13] 19 MD14 A[13] DQ[14] 20 MD15 A[13] DQ[14] 20 MD15 VCC3_DUAL VCC3_DUAL VCC3_DUAL DQ[15] 51 DQ[15] 51 NC MD16 NC MD16 55 55 DQM0 28 DQ[16] 56 MD17 DQM0 28 DQ[16] 56 MD17 DQM1 29 DQM[0] DQ[17] 57 MD18 DQM1 29 DQM[0] DQ[17] 57 MD18 C79 C59 C47 DQM2 46 DQM[1] DQ[18] 58 MD19 DQM2 46 DQM[1] DQ[18] 58 MD19 0.1U 0.1U 0.1U DQM3 47 DQM[2] DQ[19] 60 MD20 DQM3 47 DQM[2] DQ[19] 60 MD20 DQM4 DQM[3] DQ[20] MD21 DQM4 DQM[3] DQ[20] MD21 112 65 112 65 DQM5 113 DQM[4] DQ[21] 66 MD22 DQM5 113 DQM[4] DQ[21] 66 MD22 DQM6 130 DQM[5] DQ[22] 67 MD23 DQM6 130 DQM[5] DQ[22] 67 MD23 DQM7 131 DQM[6] DQ[23] 146 DQM7 131 DQM[6] DQ[23] 146 DQM[7] NC 69 MD24 DQM[7] NC 69 MD24 DQ[24] MD25 DQ[24] MD25 70 70 21 DQ[25] 71 MD26 21 DQ[25] 71 MD26 22 CB[0] DQ[26] 72 MD27 22 CB[0] DQ[26] 72 MD27 52 CB[1] DQ[27] 74 MD28 52 CB[1] DQ[27] 74 MD28 53 CB[2] DQ[28] 75 MD29 53 CB[2] DQ[28] 75 MD29 CB[3] DQ[29] MD30 CB[3] DQ[29] MD30 105 76 105 76 106 CB[4] DQ[30] 77 MD31 106 CB[4] DQ[30] 77 MD31 136 CB[5] DQ[31] 145 136 CB[5] DQ[31] 145 137 CB[6] NC 86 MD32 137 CB[6] NC 86 MD32 CB[7] DQ[32] 87 MD33 CB[7] DQ[32] 87 MD33 SRAS# DQ[33] MD34 SRAS# DQ[33] MD34 115 88 115 88 3 SRAS# SRAS# DQ[34] SRAS# DQ[34] SCAS# 111 89 MD35 SCAS# 111 89 MD35 3 SCAS# SCAS# DQ[35] SCAS# DQ[35] 91 MD36 91 MD36 CSA#0 30 DQ[36] 92 MD37 CSA#2 30 DQ[36] 92 MD37 CSA#1 114 S#[0] DQ[37] 93 MD38 CSA#3 114 S#[0] DQ[37] 93 MD38 CSB#0 S#[1] DQ[38] MD39 CSB#2 S#[1] DQ[38] MD39 45 94 45 94 CSB#1 129 S#[2] DQ[39] 135 CSB#3 129 S#[2] DQ[39] 135 S#[3] NC 95 MD40 S#[3] NC 95 MD40 RAMW# 27 DQ[40] 97 MD41 RAMW# 27 DQ[40] 97 MD41 3 RAMW# 48 WE0# DQ[41] 98 MD42 48 WE0# DQ[41] 98 MD42 WE2# DQ[42] MD43 VCC3_DUAL WE2# DQ[42] MD43 99 99 SDCLK0 42 DQ[43] 100 MD44 SDCLK4 42 DQ[43] 100 MD44 SDCLK1 125 CK[0] DQ[44] 101 MD45 SDCLK5 125 CK[0] DQ[44] 101 MD45 SDCLK2 79 CK[1] DQ[45] 103 MD46 SDCLK6 79 CK[1] DQ[45] 103 MD46 SDCLK3 163 CK[2] DQ[46] 104 MD47 R63 SDCLK7 163 CK[2] DQ[46] 104 MD47 CKE0 CK[3] DQ[47] CKE2 CK[3] DQ[47] 128 134 8.2K 128 134 CKE1 63 CKE[0] NC 139 MD48 CKE3 63 CKE[0] NC 139 MD48 CKE[1] DQ[48] 140 MD49 CKE[1] DQ[48] 140 MD49 DQ[49] 141 MD50 DQ[49] 141 MD50 SMCLK 83 DQ[50] 142 MD51 SMCLK 83 DQ[50] 142 MD51 6,8,20 SMCLK SMBDAT SCL DQ[51] MD52 SMBDAT SCL DQ[51] MD52 82 144 82 144 6,8,20 SMBDAT SDA DQ[52] SDA DQ[52] 165 addr = 149 MD53 165 addr = 149 MD53 166 SA[0] DQ[53] 150 MD54 166 SA[0] DQ[53] 150 MD54 167 SA[1] 1010000b DQ[54] 151 MD55 167 SA[1] 1010001b DQ[54] 151 MD55 SA[2] DQ[55] 109 SA[2] DQ[55] 109 NC MD56 NC MD56 153 153 DQ[56] 154 MD57 DQ[56] 154 MD57 81 DQ[57] 155 MD58 81 DQ[57] 155 MD58 24 WP/NC DQ[58] 156 MD59 24 WP/NC DQ[58] 156 MD59 25 NC DQ[59] 158 MD60 25 NC DQ[59] 158 MD60 NC DQ[60] MD61 NC DQ[60] MD61 50 159 50 159 31 NC DQ[61] 160 MD62 31 NC DQ[61] 160 MD62 44 NC/OE#0 DQ[62] 161 MD63 44 NC/OE#0 DQ[62] 161 MD63 NC/OE#2 DQ[63] NC/OE#2 DQ[63] VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS NC NC NC NC NC NC NC NC SDRAM DIMM SDRAM DIMM 108 107 116 127 138 148 152 162 108 107 116 127 138 148 152 162 61 62 80 12 23 32 43 54 64 68 78 85 96 61 62 80 12 23 32 43 54 64 68 78 85 96 1 1 J E T W A Y I N F ORMATION CSA#[0..3] 3 CSA#[0..3] CSB#[0..3] Title 3 CSB#[0..3] D I M M 1 & DIMM2 SDCLK[0..7] 8 SDCLK[0..7] Size D o c u m e n t Number Rev CKE[0..3] B J - 6 3 0 C F REV:3.0 3.0 22 CKE[0..3] Date: S a t u r d a y , A u g u s t 11, 2001 Sheet 7 of 26
  8. Frequency Selection VCC3 FS0 1 FS1 1 RN13 JP2 @ 1 3 2 4 QQ5 QQ6 1 2 FS0 FS1 R75 R76 10K 10K VCC3 CLOCK SPACE > 14 mil 5 6 QQ7 3 4 FS2 R77 10K 7 8 QQ8 5 6 FS3 R78 10K 7 8 2.7KX4 HEADER 4X2 R48 10K VCC3 C24 C50 C52 C48 C27 CPUV 10pF 10pF 10pF 10pF 15pF L21 CPU CLK 2.5V LEVEL C23 C49 C51 C53 C22 FB 10pF 10pF 10pF 10pF 10pF BC22 BC13 BC14 BC15 BC23 BC45 BC20 BC19 BC18 .1U .1U .1U .1U .1U .1U .1U .1U .1U U3 C L O C K GENERATOR 1 46 R43 22 630CCLK VDDREF CPUCLK0 630CCLK 3 45 15 CPUCLK1 43 R44 22 370CPUCLK VDDSDR CPUCLK2 370CPUCLK 1 19 27 VDDSDR 30 VDDSDR 7 VDDSDR FS1/PCICLK0 FS1 1 36 8 RN7 22X4 VDDSDR FS2/PCICLK1 FS2 42 9 2 1 PCICLK1 VDDSDR PCICLK2 PCICLK1 13 + BC21 11 4 3 PCICLK2 PCICLK2 13 22uF 6 PCICLK3 12 6 5 PCICLK3 VDDPCI PCICLK4 PCICLK3 14 13 8 7 697PCLK PCICLK5 697PCLK 23 14 630PCLK PCICLK6 630PCLK 4 R55 22 3 GNDREF 16 2 FS3 R54 22 PICCLK GNDSDR FS3/REF0 PICCLK 1 22 48 R42 22 VOSCI GNDSDR REF1 VOSCI 5 VCC2.5 33 39 GNDSDR GNDSDR 10 25 CPUV R47 22 SIO48M GNDPCI 24_48/CPU2V_3V# SIO48M 23 L7 26 FS0 R46 22 UCLK48M FB FS0/48MHZ UCLK48M 6 RN5 0X4 SDCLK[0..7] 7 17 2 1 SDCLK4 SDRAM0 18 4 3 SDCLK5 SDRAM1 SDCLK0 20 6 5 47 SDRAM2 21 8 7 SDCLK1 VDDLCPU SDRAM3 28 7 8 SDCLK6 SDRAM4 29 5 6 SDCLK7 SDRAM5 31 3 4 SDCLK2 BC11 BC9 BC10 BC12 SDRAM6 SDCLK3 32 1 2 10U SDRAM7 34 630SDCLK 0.1uF 0.1uF 0.001uF SDRAM8 630SDCLK 3 35 44 SDRAM9 37 R45 GNDL SDRAM10 RN2 38 10 # 630SDCLK-630CPUCLK
  9. INT. RTC MUST CLOSE TO CHIP RTCVDD PIN SB5V R244 180 C C B Q19 2N3904 E RTCVDD B E (~2.4V) + BC151 1 22uF D6 R L Z2.4A-DIP D12 1N4148 D7 2 + BC155 470UF 1N4148 D11 JP6 1N4148 R219 3 2 BATOK 6 1 120K D10 HEADER 3 1N4148 1-2 : CLEAR CMOS + C131 100UF 0603 C111 D D9 1N4148 R406 NC-0 1uF-0805 C100 0.01uF G S D Q18 N D S 3 5 2AP-SOT23 R242 P L ACE NEAR TO SiS 630E G 470 R241 NOTE: 100K P i n D and S can NOT be SWAPPED S R243 1K BAT BAT1 Lithium 3V/60MA J E T W A Y I N F ORMATION NOTE: S I S IS NOT RESPONSIBLE FOR Title A N Y ERRORS OR OMISSIONS IN RTC T H ESE SCHEMATICS. THIS IS AN EXAMPLE ONLY. Size D o c u m e n t Number Rev B J - 6 3 0 C F REV:3.0 3.0 Date: S a t u r d a y , A u g u s t 11, 2001 Sheet 9 of 26
  10. ALC100/ALC200/AD1881/WM9703/CS4297A/STAC9721 +12V VCCA UTC VCCD L46 78L05 VCC L45 VCCA 1 3 VIN VOUT 0 BC175 BC176 BC193 BC192 C501 GND FB 10uF 0.1uF 10uF 0.1uF VCC VCC + + C502 C500 10uF 10uF 105P 2 VCC VCCD VCC3 BC187 BC190 R281 10uF .1U 3.3V AC97 CODEC 0 VCCA R280 5V AC97 CODEC OPEN-0 BC170 BC171 BC191 BC189 10uF 0.1uF 10uF 0.1uF VCCD VCCA CS4297A=.22UF U17 AD1881/WM9703/STAC9721=1U 25 38 39 40 41 43 44 9 1 NC NC NC NC NC DVDD2 DVDD1 AVDD1 AVDD2 24 BC156 1uF LINE_IN_R R279 LINE_IN_R LINE_IN_R 11 VCC NC-0 47 23 BC158 1uF LINE_IN_L 6,12 SDATI1 CHAIN_IN LINE_IN_L LINE_IN_L 11 ACS0 48 21 BC157 1uF MIC1 CLOCK_OUT MIC1 MIC1 11 22 +2.25Vref OPEN AC_RESET# 11 MIC2 R276 OPEN 6,12 AC_RESET# SDATO 5 RESET 20 CD_R R278 BC160 1uF CD_R 11 ACS1 6,12 SDATO SDATI0 8 SDATA_OUT CD_R 18 1uF CD_L BC161 CD_L 11 6,12 SDATI0 SYNC SDATA_IN CD_L 1uF CD_GND 10 19 BC159 6,12 SYNC SYNC CD_GND CD_GND 11 BIT_CLK 6 6,12 BIT_CLK BIT_CLK 17 BC162 1uF VIDEO_R VIDEO_R VIDEO_R 11 PC_BEEP 12 16 BC163 1uF VIDEO_L PC_BEEP VIDEO_L VIDEO_L 11 A D 1 8 8 1/CS4297A/WM9703/STAC9721 DO NOT STUFF = MASTER CODEC 15 BC164 1uF AUX_R AUX_R AUX_R 11 VCC 14 BC165 1uF AUX_L AUX_L AUX_L 11 R277 OPEN ACS1 46 13 BC166 1uF CS1 PHONE PHONE_IN 12 ACS0 45 37 BC186 1uF TO AC97 MODEM IN CS0 MONO_OUT MONO_OUT 12 TO AC97 MODEM OUT R275 OPEN 36 LINE_OUT_R LINE_OUT_R LINE_OUT_R 11 35 LINE_OUT_L LINE_OUT_L LINE_OUT_L 11 R245 +2.25Vref 28 11 +2.25Vref VREFOUT 27 0 VREF BC188 BC185 BC169 BC184 C148 C149 680pF 680pF XTAL_OUT 680pF 10uF XTAL_IN DVSS2 DVSS1 AVSS1 AVSS2 FILT_R AFILT1 AFILT2 FILT_L RX3D CX3D BC172 AD1881 29 30 31 32 33 34 26 42 CS4297A DO NOT STUFF OPEN-.1U 2 3 7 4 0.1uF CS4297A STUFF O P E N-1U-0805 R500 BC168 10uF NC Y4 R267 24.5MHZ 12 24.576MHz NC-10 BC177 5pF ALC100 ALC200 BC194 R275 X R275 x 10pF R296 1.37K BC200 100nF PC_BEEP 6,19,23 SPKR R277 X R277 x BC182 AD1881/WM9703=STUFF C S 4297A/STAC9721=DO NOT STUFF R295 BC182 X BC182 x 4.99K BC201 NC-.1uF 100nF BC183 X BC183 x C200 BC183 C200 X C200 105P 105P NC-47nF BC181 X BC181 x AD1881 WM9703 CS4297A STAC9721 BC180 X BC180 1u 1U 10U .01U .1U/10U BC179 1u BC179 1u BC181 OPEN-10U BC174 102P BC174 102P 1U X X X BC180 1uF BC173 102P BC173 102P 270P X 1000P 820P PIN 39 X PIN 39 x BC179 1uF J E T W A Y I N F ORMATION PIN 40 X Pin 40 x 270P 270P 1000P 820P BC174 270pF Title AC'97 CODEC BC173 270pF Size D o c u m e n t Number Rev B J - 6 3 0 C F REV:3.0 3.0 Date: S a t u r d a y , A u g u s t 11, 2001 Sheet 10 of 26
  11. VCCA FOR CS4297A STUFF R204 OPEN-1.8K R205 10 +2.25Vref 2K C127 R207 R402 CDIN1 10 CD_R C138 NC BC149 L37 R206 1K 1 10U 1nF 220PF 47K 2 10 LINE_IN_R 3 FB BC146 4 R246 1000P J3 R209 H 4 X 1 - 2 . 54mm-POST 47K J4 10 CD_L R210 BC150 1K L38 47K 1nF CDIN2 C128 10 LINE_IN_L R164 1 FB BC147 10 MIC1 R208 2 R247 3.3K BC143 1000P LINE INPUT 0.068U 10 CD_GND 3 47K 3300PF MIC INPUT 1K 4 H 4 X 1 - 2 .0mm-POST VCC L500 FB-31 R400 NC-0-20K 0 R202 C123 R502 NC-100U 33 L35 FB-300OHM J2 C136 R220 C133 U15-NC LOR LOUT_R 1 8 10 LINE_OUT_R OUTA VDD L36 FB-300OHM 1U NC-0-20K NC-100P 2 7 LOL INA OUTB 3 6 R501 BYPS INB C125 C126 33 C109 C108 C137 R221 C134 L I NE OUTPUT LOUT_L 4 5 NC-.1U NC-100U R504 470P 470P 10 LINE_OUT_L GND SHDN NC R503 1U NC-0-20K NC-100P L M 4 8 8 0-250MW NC C124 NC-1U-0805 R203 NC-0-20K R401 R248 VCC3 VCC 0 10 VIDEO_R C139 1K R249 NC-100P JP4 R138 R122 47K OPEN-0 OPEN-0 1 2 R139 R250 3 10 VIDEO_L 4 6 SPDIF R251 C140 1K H 4 X 1 - 2 .54mm-POST OPEN-47 47K NC-100P R123 OPEN SPDIF 2 open-h2x1 1 R252 10 AUX_R 1K R253 C141 NC-100P JP5 47K 1 2 R254 3 10 AUX_L 4 R255 C142 1K H 4 X 1 - 2 .54mm-POST 47K NC-100P J E T W A Y I N F ORMATION Title A U D I O A N A L O G UE IN/OUT Size D o c u m e n t Number Rev B J - 6 3 0 C F REV:3.0 3.0 Date: S a t u r d a y , A u g u s t 11, 2001 Sheet 11 of 26
  12. -DATA4 R171 22 UV4- UV4- 6 +DATA4 R170 22 UV4+ UV4+ 6 R166 R167 C97 C98 15K 15K 47pF 47pF P L ACE THESE COMPONENT NEAR SiS630 AMR VCC3 +12V TO SUBAUDIO SYSTEM PHONE_IN PHONE_IN 10 VCC -12V AMR1 SB5V SB3V TO MODEM SYSTEM B1 A1 AUDIO_MUTE# AUDIO_PWRDN B2 A2 MONO_OUT B3 GND MONO_PHONE A3 10 MONO_OUT MONO_OUT/PC_BEE RESERVED B4 A4 B5 RESERVED RESERVED A5 B6 RESERVED RESERVED A6 PRIMARY_DN# GND B7 A7 B8 -12V 5VDUAL/5VSB A8 OC1# GND USB_OC OC1# 6,17 B9 A9 B10 +12V GND A10 +DATA4 B11 GND USB+ A11 -DATA4 +5V USB- B12 A12 B13 GND GND A13 B14 RESERVED S/P-DIF_IN A14 B15 RESERVED GND A15 B16 +3.3V 3.3VDUAL/3.3VSB A16 SDATO GND GND SYNC B17 A17 6,10 SDATO SDATA_OUT SYNC SYNC 6,10 AC_RESET# B18 A18 6,10 AC_RESET# RESET# GND B19 A19 SDATI1 SDATA_IN[3] SDATA_IN[1] SDATI1 6,10 B20 A20 B21 GND GND A21 SDATI0 SDATA_IN[2] SDATA_IN[0] SDATI0 6,10 B22 A22 R189 B23 GND GND A23 BIT_CLK 10 24.5MHZ MSTRCLK BITCLK BIT_CLK 6,10 10 Critical trace AMR-CON. C122 OPEN J E T W A Y I N F ORMATION Title A U D I O / M O DEM RISER Size D o c u m e n t Number Rev B J - 6 3 0 C F REV:3.0 3.0 Date: S a t u r d a y , A u g u s t 11, 2001 Sheet 12 of 26
  13. VCC3 VCC3 VCC3 VCC3 VCC VCC VCC VCC -12V +12V -12V +12V PCI_1 PCI_2 B1 A1 TRST# B1 A1 TRST# -12V TRST# TRST# 4,14,15,23 -12V TRST# TCK B2 A2 TCK B2 A2 14 TCK TCK +12V TCK +12V B3 A3 TMS B3 A3 TMS GROUND TMS TMS 4,14,15,23 GROUND TMS B4 A4 TDI B4 A4 TDI B5 TDO TDI A5 TDI 4,14,15,23 B5 TDO TDI A5 B6 +5V +5V A6 INT#B B6 +5V +5V A6 INT#C +5V INT#[A] INT#B 4,14 +5V INT#[A] INT#C B7 A7 INT#D INT#D B7 A7 INT#A 4,14,15,23 INT#C INT#[B] INT#[C] INT#D 4,14 INT#[B] INT#[C] INT#A B8 A8 INT#B B8 A8 4,14,15,23 INT#A INT#[D] +5V INT#[D] +5V VCC3 B9 A9 B9 A9 B10 PRSNT#[1] RESERVED A10 SB3V B10 PRSNT#[1] RESERVED A10 SB3V B11 RESERVED +5V(I/O) A11 B11 RESERVED +5V(I/O) A11 R310 PRSNT#[2] RESERVED PRSNT#[2] RESERVED B12 A12 B12 A12 1K B13 GROUND GROUND A13 B13 GROUND GROUND A13 B14 GROUND GROUND A14 B14 GROUND GROUND A14 B15 RESERVED RESERVED A15 PCIRST# B15 RESERVED RESERVED A15 PCIRST# GROUND RST# PCIRST# 4,14,15,23 GROUND RST# PCICLK1 B16 A16 PCICLK2 B16 A16 8 PCICLK1 CLK +5V(I/O) PGNT#0 8 PCICLK2 CLK +5V(I/O) PGNT#1 B17 A17 B17 A17 GROUND GNT# PGNT#0 4 GROUND GNT# PGNT#1 4,14,15,23 PREQ#0 B18 A18 PREQ#1 B18 A18 4,14 PREQ#0 REQ# GROUND R222 0 4,14 PREQ#1 REQ# GROUND R223 B19 A19 PME# B19 A19 0 PME# +5V(I/O) RESERVED PME# 6,14,23 +5V(I/O) RESERVED AD31 B20 A20 AD30 AD31 B20 A20 AD30 AD29 B21 AD[31] AD[30] A21 AD29 B21 AD[31] AD[30] A21 AD[29] +3.3V AD28 AD[29] +3.3V AD28 B22 A22 B22 A22 AD27 B23 GROUND AD[28] A23 AD26 AD27 B23 GROUND AD[28] A23 AD26 AD25 B24 AD[27] AD[26] A24 AD24 AD25 B24 AD[27] AD[26] A24 B25 AD[25] GROUND A25 B25 AD[25] GROUND A25 AD24 +3.3V AD[24] R224 +3.3V AD[24] C/BE#3 B26 A26 AD20 C/BE#3 B26 A26 R225 AD22 AD23 C/BE#[3] IDSEL AD23 C/BE#[3] IDSEL B27 A27 100 B27 A27 100 B28 AD[23] +3.3V A28 AD22 B28 AD[23] +3.3V A28 AD22 AD21 B29 GROUND AD[22] A29 AD20 AD21 B29 GROUND AD[22] A29 AD20 AD19 B30 AD[21] AD[20] A30 AD19 B30 AD[21] AD[20] A30 B31 AD[19] GROUND A31 AD18 B31 AD[19] GROUND A31 AD18 AD17 +3.3V AD[18] AD16 AD17 +3.3V AD[18] AD16 B32 A32 B32 A32 B33 AD[17] AD[16] A33 B33 AD[17] AD[16] A33 C/BE#2 B34 C/BE#[2] +3.3V A34 FRAME# C/BE#2 B34 C/BE#[2] +3.3V A34 FRAME# GROUND FRAME# FRAME# 4,14,15,23 GROUND FRAME# IRDY# B35 A35 IRDY# B35 A35 4,14 IRDY# B36 IRDY# GROUND A36 TRDY# B36 IRDY# GROUND A36 TRDY# +3.3V TRDY# TRDY# 4,14,15,23 +3.3V TRDY# DEVSEL# B37 A37 DEVSEL# B37 A37 4,14 DEVSEL# DEVSEL# GROUND DEVSEL# GROUND B38 A38 STOP# B38 A38 STOP# GROUND STOP# STOP# 4,14,15,23 GROUND STOP# PLOCK# B39 A39 PLOCK# B39 A39 4,14 PLOCK# PERR# B40 LOCK# +3.3V A40 SDONE1 PERR# B40 LOCK# +3.3V A40 SDONE2 14 PERR# B41 PERR# SDONE A41 SBO#1 B41 PERR# SDONE A41 SBO#2 SERR# +3.3V SBO# SERR# +3.3V SBO# B42 A42 B42 A42 4,14 SERR# SERR# GROUND SERR# GROUND B43 A43 PAR B43 A43 PAR +3.3V PAR PAR 4,14,15,23 +3.3V PAR C/BE#1 B44 A44 AD15 C/BE#1 B44 A44 AD15 AD14 B45 C/BE#[1] AD[15] A45 AD14 B45 C/BE#[1] AD[15] A45 B46 AD[14] +3.3V A46 AD13 B46 AD[14] +3.3V A46 AD13 AD12 GROUND AD[13] AD11 AD12 GROUND AD[13] AD11 B47 A47 B47 A47 AD10 B48 AD[12] AD[11] A48 AD10 B48 AD[12] AD[11] A48 B49 AD[10] GROUND A49 AD9 B49 AD[10] GROUND A49 AD9 GROUND AD[9] GROUND AD[9] AD8 B52 A52 C/BE#0 AD8 B52 A52 C/BE#0 AD7 B53 AD[8] C/BE#[0] A53 AD7 B53 AD[8] C/BE#[0] A53 B54 AD[7] +3.3V A54 AD6 B54 AD[7] +3.3V A54 AD6 AD5 B55 +3.3V AD[6] A55 AD4 AD5 B55 +3.3V AD[6] A55 AD4 AD3 B56 AD[5] AD[4] A56 AD3 B56 AD[5] AD[4] A56 AD[3] GROUND AD2 AD[3] GROUND AD2 B57 A57 B57 A57 VCC AD1 B58 GROUND AD[2] A58 AD0 VCC VCC AD1 B58 GROUND AD[2] A58 AD0 VCC R226 B59 AD[1] AD[0] A59 R227 R256 B59 AD[1] AD[0] A59 R257 B60 +5V(I/O) +5V(I/O) A60 B60 +5V(I/O) +5V(I/O) A60 B61 ACK64# REQ64# A61 B61 ACK64# REQ64# A61 +5V +5V +5V +5V 2.7K B62 A62 2.7K 2.7K B62 A62 2.7K +5V +5V +5V +5V PCI_CON PCI_CON C/BE#[0..3] 4,14,15,23 C/BE#[0..3] AD[0..31] 4,14,15,23 AD[0..31] VCC VCC VCC RN71 RN73 RN72 SDONE1 1 2 FRAME# 1 2 TRST# 1 2 SDONE2 3 4 IRDY# 3 4 TCK 3 4 J E T W A Y I N F ORMATION SBO#2 5 6 TRDY# 5 6 TMS 5 6 SBO#1 7 8 DEVSEL# 7 8 TDI 7 8 Title 4.7KX4 2.7KX4 4.7KX4 P C I C O N N E C T OR 1 & 2 Size D o c u m e n t Number Rev B J - 6 3 0 C F REV:3.0 3.0 Date: S a t u r d a y , A u g u s t 11, 2001 Sheet 13 of 26
  14. VCC3 VCC3 VCC VCC -12V +12V PCI_3 B1 A1 TRST# -12V TRST# TRST# 4,13,15,23 TCK B2 A2 13 TCK TCK +12V B3 A3 TMS GROUND TMS TMS 4,13,15,23 B4 A4 TDI TDO TDI TDI 4,13,15,23 B5 A5 +5V +5V INT#D B6 A6 +5V INT#[A] INT#D 4,13 INT#A B7 A7 INT#B 4,13,15,23 INT#A INT#[B] INT#[C] INT#B 4,13 INT#C B8 A8 4,13,15,23 INT#C B9 INT#[D] +5V A9 SB3V VCC3 VCC3 B10 PRSNT#[1] RESERVED A10 RESERVED +5V(I/O) B11 A11 B12 PRSNT#[2] RESERVED A12 R410 B13 GROUND GROUND A13 1K B14 GROUND GROUND A14 R212 B15 RESERVED RESERVED A15 PCIRST# OPEN-4.7K GROUND RST# PCIRST# 4,13,15,23 PCICLK3 B16 A16 8 PCICLK3 CLK +5V(I/O) B17 A17 PGNT#2 GROUND GNT# PGNT#2 4 PREQ#2 B18 A18 4 PREQ#2 REQ# GROUND 0 B19 A19 R268 PME# PCIRST# +5V(I/O) RESERVED PME# 6,13,23 AD31 B20 A20 AD30 AD29 AD[31] AD[30] B21 A21 B22 AD[29] +3.3V A22 AD28 AD27 B23 GROUND AD[28] A23 AD26 AD25 B24 AD[27] AD[26] A24 AD24 B25 AD[25] GROUND A25 C/BE#3 +3.3V AD[24] R269 AD24 B26 A26 AD23 B27 C/BE#[3] IDSEL A27 100 B28 AD[23] +3.3V A28 AD22 AD21 B29 GROUND AD[22] A29 AD20 AD19 B30 AD[21] AD[20] A30 AD[19] GROUND AD18 B31 A31 AD17 B32 +3.3V AD[18] A32 AD16 B33 AD[17] AD[16] A33 C/BE#2 B34 C/BE#[2] +3.3V A34 FRAME# GROUND FRAME# FRAME# 4,13,15,23 IRDY# B35 A35 4,13 IRDY# IRDY# GROUND TRDY# B36 A36 +3.3V TRDY# TRDY# 4,13,15,23 DEVSEL# B37 A37 4,13 DEVSEL# DEVSEL# GROUND B38 A38 STOP# GROUND STOP# STOP# 4,13,15,23 PLOCK# B39 A39 4,13 PLOCK# PERR# B40 LOCK# +3.3V A40 SDONE3 13 PERR# PERR# SDONE SBO#3 B41 A41 SERR# B42 +3.3V SBO# A42 4,13 SERR# SERR# GROUND B43 A43 PAR +3.3V PAR PAR 4,13,15,23 C/BE#1 B44 A44 AD15 AD14 B45 C/BE#[1] AD[15] A45 AD[14] +3.3V AD13 B46 A46 AD12 B47 GROUND AD[13] A47 AD11 AD10 B48 AD[12] AD[11] A48 B49 AD[10] GROUND A49 AD9 GROUND AD[9] AD8 B52 A52 C/BE#0 AD7 B53 AD[8] C/BE#[0] A53 B54 AD[7] +3.3V A54 AD6 AD5 B55 +3.3V AD[6] A55 AD4 AD3 AD[5] AD[4] B56 A56 VCC B57 AD[3] GROUND A57 AD2 AD1 B58 GROUND AD[2] A58 AD0 VCC B59 AD[1] AD[0] A59 R272 R273 B60 +5V(I/O) +5V(I/O) A60 ACK64# REQ64# B61 A61 2.7K B62 +5V +5V A62 2.7K +5V +5V PCI_CON C/BE#[0..31] 4,13,15,23 C/BE#[0..3] AD[0..31] 4,13,15,23 AD[0..31] VCC VCC3 VCC VCC RN70 RN76 R270 4.7K RN74 PREQ#2 1 2 INT#B 2 1 SDONE3 STOP# 1 2 J E T W A Y I N F ORMATION PREQ#1 3 4 INT#C 4 3 PLOCK# 3 4 4,13 PREQ#1 PREQ#0 INT#D PERR# 5 6 6 5 5 6 4,13 PREQ#0 7 8 INT#A 8 7 R271 4.7K SERR# 7 8 Title SBO#3 P C I C O N NECTOR 3&4 2.7KX4 8.2KX4 2.7KX4 Size D o c u m e n t Number Rev B J - 6 3 0 C F REV:3.0 3.0 Date: S a t u r d a y , A u g u s t 11, 2001 Sheet 14 of 26
  15. IDEDA[0..15] 4 IDEDA[0..15] RN61 33X4 DA8 2 1 IDEDA8 DA9 4 3 IDEDA9 DA10 6 5 IDEDA10 DA11 8 7 IDEDA11 R201 DA15 2 1 IDEDA15 DA14 4 3 IDEDA14 10K DA13 6 5 IDEDA13 IDE1 DA12 8 7 IDEDA12 IDERST# VCC3 IDEDA7 DA7 1 2 DA8 IDEDA8 RN64 IDEDA6 DA6 3 4 DA9 IDEDA9 33X4 IDEDA5 DA5 5 6 DA10 IDEDA10 DA7 2 1 IDEDA7 IDEDA4 DA4 7 8 DA11 IDEDA11 DA6 4 3 IDEDA6 9 10 RN65 R181 IDEDA3 DA3 DA12 IDEDA12 DA5 6 5 IDEDA5 IDEDA2 DA2 11 12 DA13 IDEDA13 DA4 8 7 IDEDA4 33X4 1K 13 14 IDEDA1 DA1 DA14 IDEDA14 DA3 2 1 IDEDA3 IDEDA0 DA0 15 16 DA15 IDEDA15 DA2 4 3 IDEDA2 17 18 DA1 6 5 IDEDA1 IDEREQA R199 19 20 DA0 IDEDA0 82 8 7 4 IDEREQA 21 22 IDEIOW#A R182 22 4 IDEIOW#A 23 24 IDEIOR#A R198 22 RN62 4 IDEIOR#A ICHRDYA R197 25 26 82 33X4 4 ICHRDYA IDACK#A R180 27 28 22 4 IDACK#A IDEIRQA 29 30 R195 82 4 IDEIRQA 31 32 IDESAA1 R194 33 CBLIDA 33 34 CBLIDA 4 IDESAA0 R193 33 R179 33 IDESAA2 R196 R200 IDECS#A0 R178 35 36 R177 IDECS#A1 33 33 37 38 10K 5.6K 39 40 H20X2-POST D14 HDDLED# 19 HDDLED# 1N4148 IDESAA[0..2] 4 IDESAA[0..2] I D ECS#A[0..1] 4 I D ECS#A[0..1] IDEDB[0..15] 4 IDEDB[0..15] VCC3 VCC5 RN57 33X4 DB9 1 2 IDEDB9 DB6 3 4 IDEDB6 R511 R512 IDERST# DB8 5 6 IDEDB8 4.7K 4.7K DB7 7 8 IDEDB7 R176 DB13 1 2 IDEDB13 DB2 3 4 IDEDB2 10K DB12 5 6 IDEDB12 DB3 7 8 IDEDB3 IDE2 Q31 RN55 33X4 MMBT3904 VCC3 IDEDB7 DB7 1 2 DB8 IDEDB8 33X4 RN56 R510 IDEDB6 DB6 3 4 DB9 IDEDB9 DB11 1 2 IDEDB11 Q30 IDEDB5 DB5 5 6 DB10 IDEDB10 DB4 IDEDB4 3 4 PCIRST# MMBT3904 7 8 4,13,14,23 IDEDB4 DB4 DB11 IDEDB11 DB10 5 6 IDEDB10 IDEDB3 DB3 9 10 DB12 IDEDB12 DB5 7 8 IDEDB5 R133 1K IDEDB2 DB2 11 12 DB13 IDEDB13 DB15 1 2 IDEDB15 1K 13 14 IDEDB1 DB1 DB14 IDEDB14 DB0 3 4 IDEDB0 IDEDB0 DB0 15 16 DB15 IDEDB15 DB14 IDEDB14 5 6 17 18 DB1 7 8 IDEDB1 IDEREQB R151 82 19 20 4 IDEREQB IDEIOW#B 21 22 RN51 R149 22 33X4 4 IDEIOW#B IDEIOR#B 23 24 R135 22 4 IDEIOR#B ICHRDYB 25 26 R134 82 4 ICHRDYB 27 28 IDACK#B R132 22 4 IDACK#B 29 30 IDEIRQB R130 82 4 IDEIRQB IDESAB1 R120 31 32 CBLIDB 33 CBLIDB 4 IDESAB0 R118 33 34 R119 IDESAB2 33 33 R150 IDECS#B0 R116 35 36 R117 IDECS#B1 R131 33 33 37 38 10K 5.6K 39 40 H20X2-POST D13 HDDLED# 1N4148 IDESAB[0..2] 4 IDESAB[0..2] I D ECS#B[0..1] 4 I D ECS#B[0..1] J E T W A Y I N F ORMATION NOTE: S I S IS NOT RESPONSIBLE FOR Title A N Y ERRORS OR OMISSIONS IN I D E C O NNECTORS T H ESE SCHEMATICS. THIS IS AN EXAMPLE ONLY. Size D o c u m e n t Number Rev B J - 6 3 0 C F REV:3.0 3.0 Date: S a t u r d a y , A u g u s t 11, 2001 Sheet 15 of 26
  16. SB5V VCC JP9 JP9 :1-2 K/B POWER-ON DSABLE VCC SB5V 1 :2-3 K/B POWER-ON ENABLE SB5V 2 D20 3 HEADER 3 DIP IN5817 F1 R7 R8 FUSE CONNECTOR VIEW TOP VIEW 10K 10K 6 5 L1 KBMS1 6 5 . . KBDAT XKBDAT . . 6 KBDAT 1 13 . . . . FB 2 4 3 3 14 . . 4 2 1 3 L2 KBCLK XKBCLK 4 6 KBCLK 5 15 2 1 6 5 FB 6 . . . . C1 C2 BC2 . . . . 50pF 50pF 0.1uF 4 2 1 3 6 5 . . 4 3 . . VCC 2 1 . . R9 R10 10K 10K L3 PMDAT XPMDAT 6 PMDAT 7 16 8 FB 9 L4 PMCLK XPMCLK 10 6 PMCLK 11 12 17 FB PS/2 KB/MS R3 R4 C7 C8 BC1 200K 200K 50pF 50pF 0.1uF VGA CONNECTOR 1 D5 VCC3 D4 VCC3 D3 VCC3 3 VCC3 BAT54S BAT54S BAT54S 1 2 1 2 1 2 1 2 CONNECTOR R103 R101 TOP VIEW 3 3 3 19ohm@100MHz VGA1 2.2K 2.2K L22 FB 6 ROUT 1 2 1 11 5 ROUT 7 L24 FB GOUT 1 2 2 12 R100 33 DDC1DATA 5 GOUT DDC1DATA 5 L23 FB 8 BOUT 1 2 3 13 HSYNC 5 BOUT HSYNC 5 9 4 14 VSYNC VSYNC 5 10 5 15 R102 33 DDC1CLK DDC1CLK 5 C81 C76 C77 C73 C74 C75 C72 C80 R121 R104 R105 VGACON 75 75 75 27pF 27pF 27pF 27pF 27pF 27pF 68pF 68pF J E T W A Y I N F ORMATION NOTE: SIS IS NOT RESPONSIBLE FOR Title ANY ERRORS OR OMISSIONS IN K E Y B O A R D & M O U S E C O N NECTORS THESE SCHEMATICS. THIS IS AN EXAMPLE ONLY. Size D o c u m e n t Number Rev B J - 6 3 0 C F REV:3.0 3.0 Date: S a t u r d a y , A u g u s t 11, 2001 Sheet 16 of 26
  17. F3 FUSE IOVSB FB-600OHM L14 R68 OC0# OC0# 6 470K BC25 + BC26 BC46 R69 0.1uF 100uF 0.001uF 560K CP11 2 1 UV3- UV3- 6 USB1 4 3 UV3+ UV3+ 6 U1 6 5 UV0+ VCC UV0+ 6 H3 U2 L15 FB -DATA0 8 7 UV0- HOLE -DATA UV0- 6 H4 U3 L16 FB +DATA0 HOLE +DATA NC-47P-8P4C H5 U4 HOLE GND CP12 2 1 UV2- UV2- 6 4 3 UV2+ UV2+ 6 6 5 UV1- UV1- 6 RN59 8 7 UV1+ UV1+ 6 -DATA2 1 2 UV2- C39 C38 +DATA2 3 4 UV2+ NC-47P-8P4C 68P NC-68P -DATA1 5 6 UV1- +DATA1 7 8 UV1+ 22X4 RN58 RN8 -DATA3 1 2 UV3- 1 2 +DATA3 +DATA3 3 4 UV3+ 3 4 -DATA3 +DATA0 5 6 UV0+ 5 6 +DATA0 -DATA0 7 8 UV0- 7 8 -DATA0 22X4 15K-8P4R RN75 1 2 -DATA2 3 4 +DATA2 5 6 -DATA1 U5 7 8 +DATA1 VCC L17 FB -DATA3 H6 U6 H7 HOLE -DATA U7 L18 FB +DATA3 15K-8P4R H8 HOLE +DATA U8 HOLE GND USB-BP L13 BC24 C41 C40 68P NC-68P NC-.1U NC-FB F4 FUSE VCC L47 R285 OC1# OC1# 6,12 USB2 FB-600OHM 470K BC198 + BC196 BC197 R284 -DATA2 L41 FB 1 2 L43 FB -DATA1 3 4 0.1uF 100uF 0.001uF 560K +DATA2 L42 FB L44 FB +DATA1 5 6 7 8 9 10 H5X2-POST C151 C153 C152 C150 NC-68P 68P 68P NC-68P L48 BC199 470pF FB J E T W A Y I N F ORMATION Title U S B C O NNECTORS Size D o c u m e n t Number Rev B J - 6 3 0 C F REV:3.0 3.0 Date: S a t u r d a y , A u g u s t 11, 2001 Sheet 17 of 26
  18. LAN PLACE NEAR THE SiS630E 3.3V_RX CONNECTOR TOP VIEW P/N:UB1112C-L1 (FONCONN) SB3V C87 L9 L10 L11 L12 .01U R49 o o o o 510 L7 L5 L3 L1 UL-2 LAN R144 R142 o o o o 25.5 1% 25 .5 1% 6 PLED0 PLED0 L10 L12 UL_B1 PLED0 PLED1 VCC VCC L9 L11 x o H1 o L6 L4 L2 L8 o o o H2 x o R141 25.5 1% TPI+ H3 H4 6 6 TPI+ TPI- TPI- R145 25.5 1% 7 5 TF1 RX+ RXC RD+ RDC 1 3 L3 RO+ x oooo o o xU1 U2 U3 U4 6 2 L6 U5 U6 U7 U8 3.3V_TX 3.3V_TX 3.3V_TX RX- RD- RO- oooo o o UL-1 USB L5 H5 H6 10 12 TX+ TD+ 16 14 L4 NC NC x x 11 9 13 TXC TX- NC NC TDC TD- NC NC 15 4 8 L1 TO+ x o H7 H8 x o R143 C88 R146 C90 FC515LS L2 49.9 1% 49.9 1% C42 L7 TO- H1 10P 10P .01U L8 NC HOLE H2 NC HOLE L28 UL-2 SB3V 1 2 3.3V_TX RJ45 FB TPO+ 6 TPO+ TPO- L8 6 TPO- 1 2 FB PLACE NEAR 630E L31 1 2 SB3V 3.3V_RX R50 R51 R5 R6 FB 75 75 75 75 C32 + .01U C250 0.01U J E T W A Y I N F ORMATION NOTE: Title SIS IS NOT RESPONSIBLE FOR N E T W O R K OPTION 1 ANY ERRORS OR OMISSIONS IN THESE SCHEMATICS. THIS IS Size D o c u m e n t Number Rev AN EXAMPLE ONLY. B J - 6 3 0 C F REV:3.0 3.0 Date: S a t u r d a y , A u g u s t 11, 2001 Sheet 18 of 26
  19. 6 KBLOCK# VCC VCC VCC IOVSB VCC VCC R293 R298 R289 R291 4.7K 330 330 330 JP8 1 2 KBLOCK# 3 4 R294 5 6 C 7 8 33 9 10 R297 MD[0..63] SPKR B Q20 11 12 3,7 MD[0..63] 6,10,23 SPKR C160 13 14 4.7K 0.1uF 15 16 MMBT3904 E EXTSMI# VCC3 17 18 19 20 RSTSW# 21 22 20 RSTSW# 23 24 HDDLED# 15 HDDLED# F_PNL M D 62: PCI Clock PLL Enable MD62 R64 OPEN/4.7K R286 ACPILED 470 6 ACPILED R292 M D 61: SDRAM Clock DLL Enable MD61 R65 OPEN/4.7K 330 SB3V M D 60: CPU Clock DLL Enable MD60 R66 OPEN/4.7K M D [ 59..58]: SDRAM Clock DLL'S DRC[1..0] MD59 R67 OPEN/4.7K R288 (Default 00) MD58 R70 OPEN/4.7K 51K M D [ 57..56]: CPU Clock DLL'S DRC[1..0] MD57 R71 OPEN/4.7K (Default 00) MD56 R72 OPEN/4.7K M D [ 55..54]: PCI Clock DLL'S DRC[1..0] MD55 R73 OPEN/4.7K PWRBTN# R287 0 (Default 00) MD54 R74 OPEN/4.7K 6 PWRBTN# MD32: 0=NTSC / 1=PAL VCC3 C158 M D 38: Enable INTERRUPT MD38 R163 OPEN/4.7K 1u-0805 R290 51K 6 6 EXTSMI# C159 1U-0805 1 2 3 4 SPKR 5 6 7 8 POWER LED 9 10 RESET 11 12 13 14 TURBO LED 15 16 TURBO S/W 1 2 IDELED 3 4 SMI S/W 1 2 ACPILED 3 4 PWR BTN J E T W A Y I N F ORMATION NOTE: SIS IS NOT RESPONSIBLE FOR Title ANY ERRORS OR OMISSIONS IN D A T A A C Q U I S I T I O N & JUMPERS THESE SCHEMATICS. THIS IS AN EXAMPLE ONLY. Size D o c u m e n t Number Rev B J - 6 3 0 C F REV:3.0 3.0 Date: S a t u r d a y , A u g u s t 11, 2001 Sheet 19 of 26
  20. VCC VCC3 +12V VCC R11 L5 R56 10 1.3UH 10K H I P 6 0 2 1 -INTERSIL RT9231 + C9 C10 C21 1000P 100U C33 1U PWMPG 0.1U U2 28 C3 + C14 + VCCCORE 8 23 VCCP 2 N 2 2 22A-TO23 PGOOD OCSET R12 3.9K 1500U 1500U 9 D D SD Q2 VCC2.5 Q3 G R41 510 1 UGATE 27 26 R25 4.7 G S F D B 6 0 30L-T0252 18A S 10 DRIVE2 PHASE VSEN2 Q1 L6 3.3UH D C6 R57 R31 + R53 R2 316 25 0 G 5.1K C19 C17 C57 C35 C5 470U 470 + + + + + 11 LGATE S VCC3 SELECT F D B 6 0 30L-TO252 1500U 1500U 1500U 1000U 1000U 24 PGND 16 22 VAUX VSEN1 21 R90 C16 R14 18 FB C11 NC R17 105P DRIVE3 20 0 510 19 COMP C12 R15 VSEN3 0 VID0 7 D VID0 6 NC NC VID1 R13 VTT VID1 5 VID2 NC G 15 VID2 4 VID3 4 5 N03-DPACK DRIVE4 VID3 S 3 VID4 FAULT/RT Q6 R112 VID4 14 12 VSEN4 SS R18 R37 GND VCC FIX 270 OPEN OPEN SB1.8V C64 + R111 17 13 2 R16 1500U 1k 360K C13 C34 0.1u OPEN R52 R191 NC-0 1K C/D AUX_OK AUX_OK 6 VCC3 C71 R192 R190 470U VCC1.8V + D 510 B/G E/S 100K + C114 22uF G Q11 S 4 5 N 03-DPACK R172 470 + C117 R160 VCC2.5 1500U 1K VCC VCC VCC2.5 BC99 VCC1.8V RT9231 HIP6021 C143 BC98 + 470U .1U .1U C11 x 10P R85 R157 300 U7C U7A 1K SB5V VCC -12V VCC3 VCC SB5V +12V VCC 14 7 C12 x 102P PWRGOOD 6 5 PWMPG 1 2 PWRGD 1 PWRGOOD PWRGD 6 R15 x 20k R83 7 14 ATX1 7407 7407 R86 OPEN/2.7K 11 1 51K R17 0 2.2K 12 3.3V 3.3V 2 13 -12V 3.3V 3 R87 PSON# GND GND 8.2K C16 105P 224P 14 4 6,21 PSON# PSON# +5V 15 5 U7D U7B 16 GND GND 6 14 7 17 GND +5V 7 R57 316 330 18 GND GND 8 PW-OK 8 9 PW-OK 3 4 R88 100 PW-OK 21 -5V PWROK 19 9 20 +5V AUX5V 10 7 14 R112 270 0 +5V +12V 7407 R89 7407 ATX_PWR C61 10 .1US R111 1k NC 20 + C62 RSTSW# R172 470 0 1500U RSTSW# 19 R160 ik NC J E T W A Y I N F ORMATION 3 2 Title 1 11 HIP6021 Size D o c u m e n t Number Rev B J - 6 3 0 C F REV:3.0 3.0 Date: S a t u r d a y , A u g u s t 11, 2001 Sheet 20 of 26
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