Model based testing is the most powerful technique for testing hardware and software systems. Models in Hardware Testing describes the use of models at all the levels of hardware testing. The relevant fault models for nanoscaled CMOS technology are introduced, and their implications on fault simulation, automatic test pattern generation, fault diagnosis, memory testing and power aware testing are discussed.
In Chapter 3 we looked at fault simulation. Its purpose is to evaluate test programs in order to measure their effectiveness at distinguishing between faulty and fault-free circuits. The question of the origin of test stimuli was ignored for the moment; we simply noted that test programs could be derived from test stimuli originally intended for design veriﬁcation, or stimuli could be written speciﬁcally for the purpose of exercising the circuit to reveal the presence of physical defects, or stimuli could be produced by an automatic test pattern generator (ATPG).
Chapter 7 focused on methods for integrating design and test activities by capturing veriﬁcation suites written by logic designers and converting them to test programs. For some ICs, especially those with reasonably high yield, test programs derived from a thorough design veriﬁcation suite, combined with an IDDQ test (cf. Chapter 11), may produce quality levels that meet or exceed corporate requirements.
The ﬁrst ﬁve chapters provided a survey of algorithms for logic simulation, fault simulation, and automatic test pattern generation. That was followed by a brief survey of tester architectures and strategies to maximize tester effectiveness while minimizing overall test cost. We now turn our attention to methods for combining the various algorithms and testers in ways that make it possible to achieve quality levels consistent with product requirements and design methodologies.
This paper introduces a method for the semi-automatic generation of grammar test items by applying Natural Language Processing (NLP) techniques. Based on manually-designed patterns, sentences gathered from the Web are transformed into tests on grammaticality. The method involves representing test writing knowledge as test patterns, acquiring authentic sentences on the Web, and applying generation strategies to transform sentences into items.