The aim of this book is to provide readers with a fundamental understanding of digital system concepts such as logic gates for combinatorial logic circuit design and higher level logic elements such as counters and multiplexers.
First year undergraduates taking a course in computer science or engineering (and related disciplines like information technology) are the main target audience. Foundation year students and those taking pre-university courses (like ‘A’ levels) will also benefit from the text.
I have tried to follow a simple approach in writing the text.
In order to synthesize automat (in this case digital counters), the minimizing internal states is of particular significance and plays a decisive role in the results of synthetic circuit. This can be done in many ways, but the use of Karnaugh map is considered optimal. However, this process has some disadvantages that it can not be overcome when the number of input variants is large. In experience, if the number of variants is 7, manual minimization of circuit functions using Karnaugh map arises many difficulties and even become impossible if over 10 variants are available.
There are many methods to design digital circuits without hazard, such as the use of Boolean algebra, algebra hazard, karnaugh map, matrix method, VHDL, etc. However, these methods are not very suitable for the design of circuit system such as design of GALS circuits. In this case, synchronization is the most optimal method.
1. Introduction Hazard is the essence of digital circuits including synchronous circuit and asynchronous circuit. Hazard occurs as much as “autumn’s leaves”  and has adverse impact on the working of digital circuits. ...
Bài giảng "Thiết kế số - Chương 3: Thực hiện tối ưu hàm logic - Bìa Karnaugh và dạng tối thiểu tổng các tích" cung cấp cho người học các kiến thức: Bìa Karnaugh, nhóm trong bìa Karnaugh, K-map cho 4 biến,... Mời các bạn cùng tham khảo nội dung chi tiết.