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Bài giảng Computer Architecture: Lec 1

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Bài giảng Computer Architecture: Lec 1

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Kiến trúc máy tính là thiết kế khái niệm và cấu trúc hoạt động căn bản của một hệ thống máy tính. Để tìm hiểu sâu hơn về vấn đề này mời các bạn tham khảo "Bài giảng Computer Architecture: Lec 1 - Introduction".

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  1. EECS 252 Graduate Computer Architecture Lec 1 - Introduction John Kubiatowicz Electrical Engineering and Computer Sciences University of California, Berkeley http://www.eecs.berkeley.edu/~kubitron/cs252 http://www-inst.eecs.berkeley.edu/~cs252
  2. What is “Computer Architecture”? Applications App photo Operating System Compiler Firmware Instruction Set Architecture Instr. Set Proc. I/O system Datapath & Control Digital Design Circuit Design Layout & fab Semiconductor Materials Die photo • Coordination of many levels of abstraction • Under a rapidly changing set of forces • Design, Measurement, and Evaluation 01/09/16 CS252-S07, Lecture 01 2
  3. Technology constantly on the move! • All major manufacturers have announced and/or are shipping multi-core processor chips • Intel talking about 80 cores in not-to-distance future • 3-dimensional chip technology – Sandwiches of silicon – “Through-Vias” for communication • Number of transistors/dice keeps increasing – Intel Core 2: 65nm, 291 Million transistors! – Intel Pentium D 900: 65nm, 376 Million Transistors! Intel Core Duo 01/09/16 CS252-S07, Lecture 01 3
  4. Dramatic Technology Advance • Prehistory: Generations – 1st Tubes – 2nd Transistors – 3rd Integrated Circuits – 4th VLSI…. – 5th Nanotubes? Optical? Quantum? • Discrete advances in each generation – Faster, smaller, more reliable, easier to utilize • Modern computing: Moore’s Law – Continuous advance, fairly homogeneous technology 01/09/16 CS252-S07, Lecture 01 4
  5. Moore’s Law • “Cramming More Components onto Integrated Circuits” – Gordon Moore, Electronics, 1965 • # on transistors on cost-effective integrated circuit double every 18 months 01/09/16 CS252-S07, Lecture 01 5
  6. Joy’s Law: Exponential Performance Improvement until…2002??? 100000000 End of Joy’s Law??? 10000000 Pentium 1000000 i80486 Transistors i80386 i80286 100000 i8086 10000 i8080 i4004 1000 1970 1975 1980 1985 1990 1995 2000 Year 01/09/16 CS252-S07, Lecture 01 6
  7. Computer Architecture’s Changing Definition • 1950s to 1960s: Computer Architecture Course: Computer Arithmetic • 1970s to mid 1980s: Computer Architecture Course: Instruction Set Design, especially ISA appropriate for compilers • 1990s: Computer Architecture Course: Design of CPU, memory system, I/O system, Multiprocessors, Networks • 2000s: Multi-core design, on-chip networking, parallel programming paradigms, power reduction • 2010s: Computer Architecture Course: Self adapting systems? Self organizing structures? DNA Systems/Quantum Computing? 01/09/16 CS252-S07, Lecture 01 7
  8. The Instruction Set: a Critical Interface software instruction set hardware • Properties of a good abstraction – Lasts through many generations (portability) – Used in many different ways (generality) – Provides convenient functionality to higher levels – Permits an efficient implementation at lower levels 01/09/16 CS252-S07, Lecture 01 8
  9. Instruction Set Architecture ... the attributes of a [computing] system as seen by the programmer, i.e. the conceptual structure and functional behavior, as distinct from the organization of the data flows and controls the logic design, and the physical implementation. – Amdahl, Blaaw, and Brooks, 1964 SOFTWARE -- Organization of Programmable Storage -- Data Types & Data Structures: Encodings & Representations -- Instruction Formats -- Instruction (or Operation Code) Set -- Modes of Addressing and Accessing Data Items and Instructions -- Exceptional Conditions 01/09/16 CS252-S07, Lecture 01 9
  10. Computer Architecture is an Integrated Approach • What really matters is the functioning of the complete system – hardware, runtime system, compiler, operating system, and application – In networking, this is called the “End to End argument” • Computer architecture is not just about transistors, individual instructions, or particular implementations – E.g., Original RISC projects replaced complex instructions with a compiler + simple instructions • It is very important to think across all hardware/software boundaries – New technology New Capabilities New Architectures New Tradeoffs – Delicate balance between backward compatibility and efficiency 01/09/16 CS252-S07, Lecture 01 10
  11. Elements of an ISA • Set of machine-recognized data types – bytes, words, integers, floating point, strings, . . . • Operations performed on those data types – Add, sub, mul, div, xor, move, …. • Programmable storage – regs, PC, memory • Methods of identifying and obtaining data referenced by instructions (addressing modes) – Literal, reg., absolute, relative, reg + offset, … • Format (encoding) of the instructions – Op code, operand fields, … Current Logical State Next Logical State of the Machine of the Machine 01/09/16 CS252-S07, Lecture 01 11
  12. Example: MIPS r0 R3000 0 Programmable storage Data types ? r1 ° 2^32 x bytes Format ? ° 31 x 32-bit GPRs (R0=0) ° Addressing Modes? r31 32 x 32-bit FP regs (paired DP) PC HI, LO, PC lo hi Arithmetic logical Add, AddU, Sub, SubU, And, Or, Xor, Nor, SLT, SLTU, AddI, AddIU, SLTI, SLTIU, AndI, OrI, XorI, LUI SLL, SRL, SRA, SLLV, SRLV, SRAV Memory Access LB, LBU, LH, LHU, LW, LWL,LWR SB, SH, SW, SWL, SWR Control 32-bit instructions on word boundary J, JAL, JR, JALR BEq, BNE, BLEZ,BGTZ,BLTZ,BGEZ,BLTZAL,BGEZAL 01/09/16 CS252-S07, Lecture 01 12
  13. ISA vs. Computer Architecture • Old definition of computer architecture = instruction set design – Other aspects of computer design called implementation – Insinuates implementation is uninteresting or less challenging • Our view is computer architecture >> ISA • Architect’s job much more than instruction set design; technical hurdles today more challenging than those in instruction set design • Since instruction set design not where action is, some conclude computer architecture (using old definition) is not where action is – We disagree on conclusion – Agree that ISA not where action is (ISA in CA:AQA 4/e appendix) 01/09/16 CS252-S07, Lecture 01 13
  14. Computer Architecture Topics Input/Output and Storage Disks, WORM, Tape RAID Emerging Technologies DRAM Interleaving Bus protocols Coherence, Memory L2 Cache Bandwidth, Hierarchy Latency Other Processors Network Communication L1 Cache Addressing, VLSI Protection, Instruction Set Architecture Exception Handling Pipelining, Hazard Resolution, Pipelining and Instruction  Superscalar, Reordering,  Level Parallelism Prediction, Speculation, Vector, Dynamic Compilation 01/09/16 CS252-S07, Lecture 01 14
  15. Computer Architecture Topics Shared Memory, P M P M P M P M Message Passing, ° ° ° Data Parallelism S Interconnection Network Network Interfaces Processor­Memory­Switch Topologies, Routing, Multiprocessors Bandwidth, Networks and Interconnections Latency, Reliability 01/09/16 CS252-S07, Lecture 01 15
  16. CS 252 Course Focus Understanding the design techniques, machine structures, technology factors, evaluation methods that will determine the form of computers in 21st Century Parallelism Technology Programming Languages Applications Interface Design Computer Architecture: (ISA) • Instruction Set  Design • Organization • Hardware/Software Boundary Compilers Operating Measurement &  Systems Evaluation History 01/09/16 CS252-S07, Lecture 01 16
  17. Tentative Topics Coverage Textbook: Hennessy and Patterson, Computer Architecture: A Quantitative Approach, 4th Ed., 2006 Research Papers -- Handed out in class • 1.5 weeks Review: Fundamentals of Computer Architecture, Instruction Set Architecture, Pipelining • 2.5 weeks: Pipelining, Interrupts, and Instructional Level Parallelism, Vector Processors • 1 week: Dynamic Compilation. Data Speculation (papers). Complexity, design via genetic algorithms • 1 week: Memory Hierarchy • 1.5 weeks: Fault Tolerance, Input/Output and Storage • 1.5 weeks: Networks and Interconnection Technology • 2 weeks: Multiprocessors • 1 week: Quantum Computing, DNA Computing 01/09/16 CS252-S07, Lecture 01 17
  18. CS252: Information Instructor:Prof John D. Kubiatowicz Office: 673 Soda Hall, 643-6817 kubitron@cs Office Hours: Mon 1:00-2:30 or by appt. T. A: TBA Class: Mon/Wed, 2:30-4:00pm, 310 Soda Hall Text: Computer Architecture: A Quantitative Approach, Third Edition (2002) Web page: http://www.cs/~kubitron/cs252/ Lectures available online
  19. Lecture style • 1-Minute Review • 20-Minute Lecture/Discussion • 5- Minute Administrative Matters • 25-Minute Lecture/Discussion • 5-Minute Break (water, stretch) • 25-Minute Lecture/Discussion • Instructor will come to class early & stay after to answer questions Attention 20 min. Break “In Conclusion, ...” 01/09/16 TimeLecture 01 CS252-S07, 19
  20. Grading • 15% Homeworks (work in pairs) & paper summaries • 35% Examinations (2 Midterms) • 35% Research Project (work in pairs) – Transition from undergrad to grad student – Berkeley wants you to succeed, but you need to show initiative – pick topic – meet 3 times with faculty/TA to see progress – give oral presentation – give poster session – written report like conference paper – 3 weeks work full time for 2 people – Opportunity to do “research in the small” to help make transition from good student to research colleague • 15% Class Participation 01/09/16 CS252-S07, Lecture 01 20
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