10 - RF Oscillators
The information in this work has been obtained from sources believed to be reliable. The author does not guarantee the accuracy or completeness of any information presented herein, and shall not be responsible for any errors, omissions or damages as a result of the use of this information.
April 2012
2006 by Fabian Kung Wai Lee
1
Main References
• • •
• • •
•
•
[1]* D.M. Pozar, “Microwave engineering”, 2nd Edition, 1998 John-Wiley & Sons. [2] J. Millman, C. C. Halkias, “Integrated electronics”, 1972, McGraw-Hill. [3] R. Ludwig, P. Bretchko, “RF circuit design - theory and applications”, 2000 Prentice-Hall. [4] B. Razavi, “RF microelectronics”, 1998 Prentice-Hall, TK6560. [5] J. R. Smith,”Modern communication circuits”,1998 McGraw-Hill. [6] P. H. Young, “Electronics communication techniques”, 5th edition, 2004 Prentice-Hall. [7] Gilmore R., Besser L.,”Practical RF circuit design for modern wireless systems”, Vol. 1 & 2, 2003, Artech House. [8] Ogata K., “Modern control engineering”, 4th edition, 2005, Prentice-Hall.
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1
Agenda
• Positive feedback oscillator concepts. • Negative resistance oscillator concepts (typically employed for RF oscillator). • Equivalence between positive feedback and negative resistance oscillator theory.
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• Oscillator start-up requirement and transient. • Oscillator design - Making an amplifier circuit unstable. • Constant |G 1| circle. • Fixed frequency oscillator design. • Voltage-controlled oscillator design.
1.0 Oscillation Concepts
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2
Introduction
• Oscillators are a class of circuits with 1 terminal or port, which produce a periodic electrical output upon power up. • Most of us would have encountered oscillator circuits while studying for our basic electronics classes. • Oscillators can be classified into two types: (A) Relaxation and (B) Harmonic oscillators.
• Relaxation oscillators (also called astable multivibrator), is a class of circuits with two unstable states. The circuit switches back-and-forth between these states. The output is generally square waves. • Harmonic oscillators are capable of producing near sinusoidal output, and is based on positive feedback approach. • Here we will focus on Harmonic Oscillators for RF systems.
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Harmonic oscillators are used as this class of circuits are capable of producing stable sinusoidal waveform with low phase noise.
2.0 Overview of Feedback Oscillators
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3
Classical Positive Feedback Perspective on Oscillator (1)
E(s)
Si(s)
+
Non-inverting amplifier So(s)
=
• Consider the classical feedback system with non-inverting amplifier, • Assuming the feedback network and amplifier do not load each other, we can write the closed-loop transfer function as:
(2.1a)
( ) s
A(s)
1
( ) sA ( )sFsA ( )
oS iS
+
High impedance
=
( ) sT
( )sFsA ( )
-
(2.1b)
High impedance
Feedback network F(s)
Positive Feedback
Loop gain (the gain of the system around the feedback loop)
( )sS
-=
i
( ) sS o
1
( ) sA • Writing (2.1a) as: ( ) ( ) sFsA • We see that we could get non-zero output at So, with Si = 0, provided
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1-A(s)F(s) = 0. Thus the system oscillates!
Classical Positive Feedback Perspective on Oscillator (1)
• The condition for sustained oscillation, and for oscillation to startup from positive feedback perspective can be summarized as:
For sustained oscillation
Barkhausen Criterion (2.2a)
( ) sFsA
( ) 0 =
1
(
( )
For oscillation to startup
) 0 ( ) =sFsA
arg
-
(2.2b)
( ) 1>sFsA ( )
Note that this is a very simplistic view of oscillators. In reality oscillators are non-linear systems. The steady-state oscillatory condition corresponds to what is called a Limit Cycle. See texts on non-linear dynamical systems.
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4
• Take note that the oscillator is a non-linear circuit, initially upon power up, the condition of (2.2b) will prevail. As the magnitudes of voltages and currents in the circuit increase, the amplifier in the oscillator begins to saturate, reducing the gain, until the loop gain A(s)F(s) becomes one. • A steady-state condition is reached when A(s)F(s) = 1.
Classical Positive Feedback Perspective on Oscillator (2)
E(s)
Si(s)
+
Inverting amplifier So(s)
=
( ) s
-A(s)
• Positive feedback system can also be achieved with inverting amplifier:
1
( ) sA ( )sFsA ( )
oS iS
-
Inversion
F(s)
-
• To prevent multiple simultaneous oscillation, the Barkhausen criterion (2.2a) should only be fulfilled at one frequency. • Usually the amplifier A is wideband, and it is the function of the
2006 by Fabian Kung Wai Lee
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feedback network F(s) to ‘select’ the oscillation frequency, thus the feedback network is usually made of reactive components, such as inductors and capacitors. April 2012
Classical Positive Feedback Perspective on Oscillator (3)
• In general the feedback network F(s) can be implemented as a Pi or T network, in the form of a transformer, or a hybrid of these.
E(s)
+
So(s)
-A(s)
(
)
-=
+
X
X
X
• Consider the Pi network with all reactive elements. A simple analysis in [2] and [3] shows that to fulfill (2.2a), the reactance X1, X2 and X3 need to meet the following condition:
(2.3)
3
1
2
-
X3
If X3 represents inductor, then X1 and X2 should be capacitors.
X1
X2
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5
Classical Feedback Oscillators
+
+
+
-
-
-
Colpitt oscillator
+
-
Hartley oscillator
Armstrong oscillator
Clapp oscillator
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• The following are examples of oscillators, based on the original circuit using vacuum tubes.
Example of Tuned Feedback Oscillator (1)
2.0
1.5
A 48 MHz Transistor Common -Emitter Colpitt Oscillator
1.0
V
0.5
V
,
V_DC SRC1 Vdc=3.3 V
C CD1 C=0.1 uF
, L V
B V
0.0
R RC R=330 Ohm
-0.5
R RB1 R=10 kOhm
VC
VL
-1.0
-1.5
C Cc2 C=0.01 uF
VB
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
R RL R=220 Ohm
)w (
( ) w F A
pb_mot_2N3904_19921211 Q1
time, usec
C Cc1 C=0.01 uF
R RB2 R=10 kOhm
1
R RE R=220 Ohm
C CE C=0.01 uF
t
0
E(s)
Si(s)
So(s)
+
-A(s)
-
C C1 C=22.0 pF
C C2 C=22.0 pF
L L1 L=2.2 uH R=
F(s)
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Example of Tuned Feedback Oscillator (2)
A 27 MHz Transistor Common-Base Colpitt Oscilator
600
400
V_DC SRC1 Vdc=3.3 V
C CD1 C=0.1 uF
200
R RC R=470 Ohm
V m
V m
R RB1 R=10 kOhm
,
0
,
VC
L V
E V
-200
VL C C1 C=100.0 pF
C Cc2 C=0.1 uF
VB
-400
pb_m ot_2N3904_19921211 Q1
VE
C Cc1 C=0.1 uF
-600
R R1 R=1000 Ohm
R RB2 R=4.7 kOhm
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
R RE R=100 Ohm
L L1 L=1.0 uH C R= C3 C=4.7 pF
time, usec
C C2 C=100.0 pF
E(s)
Si(s)
So(s)
+
A(s)
+
F(s)
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Example of Tuned Feedback Oscillator (3)
A 16 MHz Transistor Common-Emitter Crystal Oscillator
V_DC SRC1 Vdc=3.3 V
C CD1 C=0.1 uF
R RC R=330 Ohm
R RB1 R=10 kOhm
VC
VL
C Cc2 C=0.1 uF
VB
R RL R=220 Ohm
pb_mot_2N3904_19921211 Q1
C Cc1 C=0.1 uF
R RB2 R=10 kOhm
R RE R=220 Ohm
C CE C=0.1 uF
C C1 C=22.0 pF
C C2 C=22.0 pF
sx_stk_CX-1HG-SM_A_19930601 XTL1 Fres=16 MHz
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Limitation of Feedback Oscillator
• At high frequency, the assumption that the amplifier and feedback
network do not load each other is not valid. In general the amplifier’s input impedance decreases with frequency, and it’s output impedance is not zero. Thus the actual loop gain is not A(s)F(s) and equation (2.2) breakdowns.
•
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• Determining the loop gain of the feedback oscillator is cumbersome at high frequency. Moreover there could be multiple feedback paths due to parasitic inductance and capacitance. It can be difficult to distinguish between the amplifier and the feedback paths, owing to the coupling between components and conductive structures on the printed circuit board (PCB) or substrate. • Generally it is difficult to physically implement a feedback oscillator once the operating frequency is higher than 500MHz.
3.0 Negative Resistance Oscillators
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8
Introduction (1)
• An alternative approach is needed to get a circuit to oscillate reliably. • We can view an oscillator as an amplifier that produces an output when there is no input.
• Thus it is an unstable amplifier that becomes an oscillator! • For example let’s consider a conditionally stable amplifier. • Here instead of choosing load or source impedance in the stable
1 | > 1 or |G
2 | > 1.
regions of the Smith Chart, we purposely choose the load or source impedance in the unstable impedance regions. This will result in either |G
1
2 greater than one implies the corresponding port resistance R1 or
• The resulting amplifier circuit will be called the Destabilized Amplifier. • As seen in Chapter 7, having a reflection coefficient magnitude for G
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or G R2 is negative, hence the name for this type of oscillator.
Introduction (2)
s | > 1 and oscillation will start up (refer back to
1
• For instance by choosing the load impedance ZL at the unstable region, 1 | > 1. We then choose the source impedance G we could ensure that |G properly so that |G Chapter 7 on stability theory).
2
1
L | > 1, enforcing either one will s | > 1
1 L | > 1 at the output port and vice versa).
2
1
s | > 1 only happens at one frequency (or a range of intended
G G G G • Once oscillation starts, an oscillating voltage will appear at both the input and output ports of a 2-port network. So it does not matter whether we enforce |G s | > 1 or |G cause oscillation to occur (It can be shown later that when |G at the input port, |G • The key to fixed frequency oscillator design is ensuring that the criteria G
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|G frequencies), so that no simultaneous oscillations occur at other frequencies.
Recap - Wave Propagation Stability Perspective (1)
Zs or G
s
2
+
=
• From our discussion of stability from wave propagation in Chapter 7…
G G
Port 1
Port 2
...
G+ b s
2 1
s
1
s
a 1
b s
G+ b s b s
Source
=⇒ a 1
1
1
s
2-port Network
2
+
G G -
...
b1
a1
b 1
1
2 1
3 1
G= b s
G+ b s
G+ b s
s
s
1
1
b s
=⇒ b 1
bs
1
1
s
bs
1
1
1
b 1 =⇒ sb
bs
s
1
1
s
2
bs
s
1
2
2G
G G Z1 or G G G G - G G G G G G - G G
bs
s
1
Compare with equation (2.1a)
3
2G
bs
s
1
3
3G
G G
Similar mathematical form
bs
s
1
=
( ) s
4
1
( ) sA ( )sFsA ( )
bs
1
s
oS iS
3G April 2012
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G - G
Recap - Wave Propagation Stability Perspective (2)
1| < 1.
s
G • We see that the infinite series that constitute the steady-state incident (a1) and reflected (b1) waves at Port 1 will only converge provided |G
1 | > 1.
s
• These sinusoidal waves correspond to the voltage and current at the Port 1. If the waves are unbounded it means the corresponding sinusoidal voltage and current at the Port 1 will grow larger as time progresses, indicating oscillation start-up condition. G
• Therefore oscillation will occur when |G • Similar argument can be applied to port 2 since the signals at Port 1
2 | > 1.
L
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10
G and 2 are related to each other in a two-port network, and we see that the condition for oscillation at Port 2 is |G
Oscillation from Negative Resistance Perspective (1)
• Generally it is more useful to work with impedance (or admittance) when designing actual circuit.
0). • • Furthermore for practical purpose the transmission lines connecting ZL and Zs to the destabilized amplifier are considered very short (length fi In this case the impedance Zo is ambiguous (since there is no transmission line).
Very short Tline
Zs
Z1
Zo
Destabilized Amp. and Load
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Z @
sZ
Z @
1Z
• To avoid this ambiguity, let us ignore the transmission line and examine the condition for oscillation phenomena in terms of terminal impedance.
Oscillation from Negative Resistance Perspective (2)
Amplifier with load ZL
Zs
Z1
jXs
jX1
Z2
ZL
V
Vamp
Source Network
Rs
R1
Port 2
Port 1
• We consider Port 1 as shown, with the source network and input of the amplifier being modeled by impedance or series networks.
1
• Using circuit theory the voltage at Port 1 can be written as:
(3.1)
=
=
V
V
s
V s
+ R 1 +
+
+
)
Z 1 +
jX ( Xj
R
Z
1
R 1
s
s
s
X Z 1 2006 by Fabian Kung Wai Lee
April 2012
22
11
(cid:215)
Oscillation from Negative Resistance Perspective (3)
Zs
Z1
L1
Cs
Z2
ZL
V
Vamp
Rs
R1
Vs
=
• Furthermore we assume the source network Zs is a series RC network and the equivalent circuit looking into the amplifier Port 1 is a series RL network.
(cid:215)
(3.2a)
( ) sV
( )sV
s
+
1
1 sC
s
where
(3.2b)
sL 1 sL 1 w j
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• Using Laplace Transform, (3.1) is written as: + R 1 + + RR s += s s
Oscillation from Negative Resistance Perspective (4)
=
=
• The expression for V(s) can be written in the “standard” form according
( ) s
2
(cid:215)
(3.3a)
s
) sL ) 1 +
( R s 1 w + 2
sC 2 s
) + w sL 1 d w + s
s
n
2 n 2 n
V V s
1 CL 1
s
s
+ RR 1
d
=
=
=
=
w Damping Factor
Natural Frequency
where
n
L 1
1 CL 1
s
to Control Theory [8]: ( + 1 Rs ( 1 + + RR L s 1 1 L 1
(3.3b)
2
C
s
-=
w
d
p1, p2 given by: • The transfer function V(s)/Vs(s) is thus a 2nd order system with two poles dw - –
(3.4)
12
p 2,1
n
n
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is negative. This is • Observe that if (R1 + Rs) < 0 the damping factor d true if R1 is negative, and |R1| > Rs. • R1 can be made negative by modifying the amplifier circuit (e.g. adding local positive feedback), producing the sum R1 + Rs < 0.
Oscillation from Negative Resistance Perspective (5)
d
w
12 -
n
• Assuming |d |<1 (under-damped), the poles as in (3.4) will be complex and exist at the right-hand side of the complex plane. • From Control Theory such a system is unstable. Any small perturbation
Im
v(t)
A small disturbance or impulse ‘starts’ the exponentially growing sinusoid
Complex pole pair
will result in a oscillating signal with frequency that grows exponentially.
+
<
0
Rs
|1 R w
o
t
Re
0
·
Complex Plane
Time Domain
·
25
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• Usually a transient or noise signal from the environment will contain a small component at the oscillation frequency. This forms the ‘seed’ in which the oscillation builts up.
Oscillation from Negative Resistance Perspective (6)
• When the signal amplitude builds up, nonlinear effects such as transistor saturation and cut-off will occur, this limits the b of the transistor and finally limits the amplitude of the oscillating signal. • The effect of decreasing b of the transistor is a reduction in the
–=
w
j
n
n,
2
w
w
=⇒=
=0 d o corresponds to w X
X
w
L 1
n
1
s
1 C sn
s
n =
p 2,1 • The steady-state oscillation frequency w ⇒= 1 CL 1 +⇒ X
0
1
sX
w
o
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13
fi magnitude of R1 (remember R1 is negative). Thus the damping factor d 0. will approach 0, since Rs+ R1 • Steady-state sinusoidal oscillation is achieved when d =0, or equivalently the poles become
Oscillation from Negative Resistance Perspective (7)
• From (3.3b), we observe that the steady-state oscillation frequency is determined by L1 and Cs, in other words, X1 and Xs respectively. • Since the voltages at Port 1 and Port 2 are related, if oscillation occur at Port 1, then oscillation will also occur at Port 2. • From this brief discussion, we use RC and RL networks for the source
+
<
+
=
0
w
Rs
R |1
o
o
=
+
0 =
+
0
X
0
and amplifier input respectively, however we can distill the more general requirements for oscillation to start-up and achieve steady- state operation for series representation in terms of resistance and reactance:
(3.5a) (3.5b)
X s
o
(3.6a) (3.6b)
|1 w o Start-up
Rs |1 R w X s X |1 w Steady-state
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Illustration of Oscillation Start-Up and Steady-State
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
-0. 2
-0. 4
-0. 6
-0. 8
0
10
2 0
30
40
50
60
70
80
90
10 0
110
120
Zs
Z1
Steady-state
R1+Rs
Oscillation start-up
ZL
Zs
0
Destabilized Amplifier
t
We need to note that this is a very simplistic view of oscillators. Oscillators are autonomous non-linear dynamical systems, and the steady-state condition is a form of Limit Cycles.
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14
• The oscillation start-up process and steady-state are illustrated.
Summary of Oscillation Requirements Using Series Network
Zs
Z1
jXs
jX1
Z2
ZL
V
Vamp
Source Network
Rs
R1
Port 2
+
<
+
=
0
w
Rs
R |1
o
o
• By expressing Zs and Z1 in terms of resistance and reactance, we conclude that the requirement for oscillation are.
Port 1 (3.6a)
0 =
+
=
+
0
0
(3.5a) (3.5b)
X s
o
(3.6b)
X |1 w o Start-up
Rs |1 R w |1 X s X w Steady-state
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• A similar expression for Z2 and ZL can also be obtained, but we shall not be concerned with these here.
The Resonator
• The source network Zs is usually called the Resonator, as it is clear that equations (3.5b) and (3.6b) represent the resonance condition between the source network and the amplifier input.
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15
• The design of the resonator is extremely important. • We shall see later that an important parameter of the oscillator, the Phase Noise is dependent on the quality of the resonator.
Summary of Oscillation Requirements Using Parallel Network
Port 1
Z2
V
jBs
G1
ZL
Gs
jB1
Vamp
• If we model the source network and input to the amplifier as parallel networks, the following dual of equations (3.5) and (3.6) are obtained.
<
=
• The start-up and steady-state conditions are:
(3.8a)
0
o
(3.7a)
o
0 =
=
0
0
w
+ GGs |1 w + Bs B |1 w
+ GGs |1 w + Bs B |1
o
(3.8b)
o
(3.7b)
Start-up
Steady-state
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Series or Parallel Representation? (1)
• The question is which to use? Series or parallel network
representation? This is not an easy question to answer as the destabilized amplifier is operating in nonlinear region as oscillator. • Concept of impedance is not valid and our discussion is only an approximation at best. • We can assume series representation, and worked out the
corresponding resonator impedance. If after computer simulation we discover that the actual oscillating frequency is far from our prediction (if there’s any oscillation at all!), then it probably means that the series representation is incorrect, and we should try the parallel representation. • Another clue to whether series or parallel representation is more
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16
accurate is to observe the current and voltage in the resonator. For series circuit the current is near sinusoidal, where as for parallel circuit it is the voltage that is sinusoidal.
Series or Parallel Representation? (2)
• Reference [7] illustrates another effective alternative, by computing the large-signal S11 of Port 1 (with respect to Zo) using CAD software. • 1/S11 is then plotted on a Smith Chart as a function of input signal magnitude at the operating frequency.
• By comparing the locus of 1/S11 as input signal magnitude is gradually increased with the coordinate of constant X or constant B circles on the Smith Chart, we can decide whether series or parallel form approximates Port 1 best.
• We will adopt this approach, but plot S11 instead of 1/S11. This will be illustrated in the examples in next section. • Do note that there are other reasons that can cause the actual
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oscillation frequency to deviate a lot from prediction, such as frequency stability issue (see [1] and [7]).
4.0 Fixed Frequency Negative Resistance Oscillator Design
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Procedures of Designing Fixed Frequency Oscillator (1)
o and extract S-
• Step 1 - Design a transistor/FET amplifier circuit. • Step 2 - Make the circuit unstable by adding positive feedback at radio frequency, for instance, adding series inductor at the base for common- base configuration. • Step 3 - Determine the frequency of oscillation w parameters at that frequency.
L in the unstable region.
• Step 4 – With the aid of Smith Chart and Load Stability Circle, make R1 < 0 by selecting G • Step 5 (Optional) – Perform a large-signal analysis (e.g. Harmonic
Balance analysis) and plot large-signal S11 versus input magnitude on Smith Chart. Decide whether series or parallel form to use.
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• Step 6 - Find Z1 = R1 + jX1 (Assuming series form).
Procedures of Designing Fixed Frequency Oscillator (2)
o. We can
• Step 7 – Find Rs and Xs so that R1 + Rs<0, X1 + Xs=0 at w
use the rule of thumb Rs=(1/3)|R1| to control the harmonics content at steady-state.
• Step 8 - Design the impedance transformation network for Zs and ZL. • Step 9 - Built the circuit or run a computer simulation to verify that the
s in the unstable region so that R2 or G2 is negative at
o .
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circuit can indeed starts oscillating when power is connected. • Note: Alternatively we may begin Step 4 using Source Stability Circle, select G w
Making an Amplifier Unstable (1)
• An amplifier can be made unstable by providing some kind of local positive feedback. • Two favorite transistor amplifier configurations used for oscillator
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design are the Common-Base configuration with Base feedback and Common-Emitter configuration with Emitter degeneration.
Making an Amplifier Unstable (2)
At 410MHz
S-PARAMETERS
DC
This is a practical model of an inductor
DC DC1
Base bypass capacitor
SStabCircle
S_Param SP1 Start=410.0 MHz Stop=410.0 MHz Step=2.0 MHz
S_StabCircle S_StabCircle1 SSC=s_stab_circle(S,51)
StabFact
LStabCircle
V_DC SRC1 Vdc=4.5 V
StabFact StabFact1 K=stab_fact(S)
R Rb1 R=10 kOhm
L LC L=330.0 nH R=
L_StabCircle L_StabCircle1 LSC=l_stab_circle(S,51)
Vout
C Cc2 C=10.0 nF
Term Term2 Num=2 Z=50 Ohm
R RLB R=0.77 Ohm
C Cb C=10.0 nF
L LB L=22 nH R=
pb_phl_BFR92A_19921214 Q1
Vin
R Rb2 R=4.7 kOhm
C Cc1 C=10.0 nF
C CLB C=0.17 pF
L LE L=330.0 nH R=
An inductor is added in series with the bypass capacitor on the base terminal of the BJT. This is a form of positive series feedback.
Term Term1 Num=1 Z=50 Ohm
R Re R=100 Ohm
Common Base Configuration
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19
Positive feedback here
Making an Amplifier Unstable (3)
s22 and s11 have magnitude > 1
freq 410.0MHz
K -0.987
freq 410.0MHz
S(1,1) 1.118 / 165.6...
S(1,2) 0.162 / 166.9...
S(2,1) 2.068 / -12.723
S(2,2) 1.154 / -3.535
L Plane
s Plane
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G Unstable Regions G
Making an Amplifier Unstable (4)
S-PARAMETERS
DC
DC DC1
SStabCircle
S_Param SP1 Start=410.0 MHz Stop=410.0 MHz Step=2.0 MHz
S_StabCircle S_StabCircle1 SSC=s_stab_circle(S,51)
StabFact
LStabCircle
V_DC SRC1 Vdc=4.5 V
R Rb1 R=10 kOhm
StabFact StabFact1 K=stab_fact(S)
L LC L=330.0 nH R=
L_StabCircle L_StabCircle1 LSC=l_stab_circle(S,51)
Vout
C Cc2 C=1.0 nF
Term Term2 Num=2 Z=50 Ohm
pb_phl_BFR92A_19921214 Q1
C Cc1 C=1.0 nF
Feedback
C Ce1 C=15.0 pF
R Rb2 R=4.7 kOhm
Term Term1 Num=1 Z=50 Ohm
R Re R=100 Ohm
C Ce2 C=10.0 pF
Common Emitter Configuration
April 2012
2006 by Fabian Kung Wai Lee
40
20
Positive feedback here
Making an Amplifier Unstable (5)
S22 and S11 have magnitude > 1
freq 410.0MHz
K -0.516
S(1,2)
freq 410.0MHz
S(1,1) 3.067 / -47.641
0.251 / 62.636
S(2,1) 6.149 / 176.803
S(2,2) 1.157 / -21.427
L Plane
s Plane
G G
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Unstable Regions
Precautions
• The requirement Rs= (1/3)|R1| is a rule of thumb to provide the excess gain to start up oscillation. • Rs that is too large (near |R1| ) runs the risk of oscillator fails to start up due to component characteristic deviation.
Clipping, a sign of too much nonlinearity
• While Rs that is too small (smaller than (1/3)|R1|) causes too much non- linearity in the circuit, this will result in large harmonic distortion of the output waveform.
V2
t
V2
Rs too small
t
For more discussion about the Rs = (1/3)|R1| rule, and on the sufficient condition for oscillation, see [6], which list further requirements.
Rs too large
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21
G G G
|G
Aid for Oscillator Design - Constant 1| Circle (1)
L to make |G
L | > 1, we would like to know the
L that would result in a specific |G
1 |.
•
1 |, the range of load reflection coefficient that
L .
•
D
L
=
1
S
S 11 1
22
L
In choosing a suitable G range of G It turns out that if we fix |G result in this value falls on a circle in the Smith chart for G • The radius and center of this circle can be derived from: G - G G -
1 |:
By fixing |G
1 | and changing G
L .
2
r
+
• Assuming r = |G
=
T
=
r
center
Radius
-
(4.1a)
(4.1b)
S 2
* SD 11 2
2
2
2
* 22 r
21 2
D
S
SS 12 r
22
S
D
22
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- -
G G G
|G
Aid for Oscillator Design - Constant 1| Circle (2)
1 | Circle is extremely useful in helping us to choose a
L that
1 | = 1.5 or larger.
• The Constant |G
2 | Circle can also be plotted for the source
suitable load reflection coefficient. Usually we would choose G would result in |G • Similarly Constant |G
s . See Ref [1] and [2] for details of derivation.
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22
G reflection coefficient. The expressions for center and radius is similar to the case for Constant |G 1 | Circle except we interchange s11 and s22, L and G
Example 4.1 – CB Fixed Frequency Oscillator Design
•
• load will be connected to the output of the
In this example, the design of a fixed frequency oscillator operating at 410MHz will be demonstrated using BFR92A transistor in SOT23 package. The transistor will be biased in Common-Base configuration. It is assumed that a 50W oscillator. The schematic of the basic amplifier circuit is as shown in the following slide.
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• The design is performed using Agilent’s ADS software, but the author would like to stress that virtually any RF CAD package is suitable for this exercise.
Example 4.1 Cont...
• Step 1 and 2 - DC biasing circuit design and S-parameter extraction.
S-PAR AME T ER S
DC
S t ab F ac t
D C D C1
StabFact StabFact 1 K=st ab_f act (S )
S_Param SP1 Start=410. 0 MH z Stop=410.0 MHz Step=2. 0 MH z
LSt abCircle
V_DC SR C1 Vdc =4.5 V
R Rb1 R=10 kO hm
L LC L=330.0 nH R=
L_St abCircle L_St abCircle1 load_s tabcir=l_s tab_c irc le(S, 51)
C C c 2 C =1. 0 nF
SStabCircle
Term Term 2 Num=2 Z=50 Ohm
S_StabCircle S_StabCircle1 source_s tabc ir=s_st ab_c irc le(S ,51)
C C b C =1.0 nF
L LB L=12. 0 nH R =
pb_phl_BF R 92A_19921214 Q1
R Rb2 R=4.7 kOhm
C C c 1 C =1. 0 nF
L LE L=220.0 nH R=
Port 1
Term Term 1 Num=1 Z=50 O hm
Port 2
Amplifier
R R e R =100 Ohm
L and G
Port 2 - Output
46
LB is chosen care- fully so that the unstable regions in both G s planes are large enough. April 2012
23
Port 1 - Input 2006 by Fabian Kung Wai Lee
Example 4.1 Cont...
freq 410.0MHz
K -0.987
freq 410.0MHz
S(1,1) 1.118 / 165.6...
S(1,2) 0.162 / 166.9...
S(2,1) 2.068 / -12.723
S(2,2) 1.154 / -3.535
Unstable Regions
Load impedance here will result in |G
Source impedance here will result in |G
1| > 1
2| > 1
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Example 4.1 Cont...
L that cause |G
1 | > 1 at 410MHz. We
1 | circles on the G
L plane to assist us in choosing
• Step 3 and 4 - Choosing suitable G
plot a few constant |G a suitable load reflection coefficient.
1 |=1.5
This point is chosen because it is on real line and easily matched.
LSC
1 |=2.0
L = 0.5<0
1 |=2.5
ZL = 150+j0
|G |G G
L Plane
G
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24
|G Note: More difficult to implement load impedance near edges of Smith Chart
Example 4.1 Cont...
• Step 5 – To check whether the input of the destabilized amplifier is
LSSP
Var Eqn
VAR VAR1 Poutv=-10.0
V_DC SRC1 Vdc=4.5 V
Large-signal S-parameter Analysis control in ADS software.
LSSP HB1 Freq[1]=410.0 MHz Order[1]=5 LSSP_FreqAtPort[1]= SweepVar="Poutv" Start=-20 Stop=-5 Step=0.2
L LC L=330.0 nH R=
R RB1 R=10 kOhm
R RL R=150 Ohm
C Cc2 C=1.0 nF
C CB C=1.0 nF
L LB L=12.0 nH R=
pb_phl_BFR92A_19921214 Q1
We are measuring large-signal S11 looking towards here
R RB2 R=4.7 kOhm
C Cc1 C=1.0 nF
L LE L=220.0 nH R=
P_1Tone PORT1 Num=1 Z=50 Ohm P=polar(dbmtow(Poutv),0) Freq=410 MHz
R RE R=100 Ohm
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closer to series or parallel form. We perform large-signal analysis and observe the S11 at the input of the destabilized amplifier.
Example 4.1 Cont...
Compare
Region where R1 or G1 is negative
Direction of S11 as magnitude of P_1tone source is increased
Boundary of Normal Smith Chart
) 1 , 1 (
S
Region where R1 or G1 is positive
Poutv (-20.000 to -5.000)
Locus of S11 versus P_1tone power at 410MHz (from -20 to -5 dBm)
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25
• Compare the locus of S11 and the constant X and constant B circles on the Smith Chart, it is clear the locus is more parallel to the constant X circle. Also the direction of S11 is moving from negative R to positive R as input power level is increased. We conclude the Series form is more appropriate.
Example 4.1 Cont...
D
L -=
+
=
.1
422
j
.0
479
1
L = 0.5<0: S 11 1
L
=
+
Z
.10
257
j
.7
851
o
Z 1
• Step 6 – Using the series form, we find the small-signal input impedance Z1 at 410MHz. So the resonator would also be a series network. • For ZL = 150 or G G - G G -
S 22 G+ 1 1
1 -= 1
X1
R1
G -
=
42.3
R s
R 1
Xs=0: @
X
X
.7
851
s
1
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• Step 7 - Finding the suitable source impedance to fulfill R1 + Rs<0, X1 + 1 3 -= - @
Example 4.1 Cont...
Port 1
Port 2
Zs = 3.42-j7.851
ZL = 150
• The system block diagram:
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26
Common-Base (CB) Amplifier with feedback
Example 4.1 Cont...
Zs= 3.42-j7.851
ZL=150
49.44pF
27.27nH
• Step 5 - Realization of the source and load impedance at 410MHz.
3.42
3.49pF
CB Amplifier
=
851.7
w
1 C
=
=
C
pF
44.49
Impedance transformation network
1 w 851.7
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50 @ 410MHz
Example 4.1 Cont... - Verification Thru Simulation
Vpp = 0.9V V = 0.45V
BFR92A
Power dissipated in the load:
2
=
P L
1 2
V R
L 2
=
=
5.0
025.2
45.0 50
mW 54
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Vpp
Example 4.1 Cont... - Verification Thru Simulation
The waveform is very clean with little harmonic distortion. Although we may have to tune the capacitor Cs to obtain oscillation at 410 MHz.
484 MHz
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• Performing Fourier Analysis on the steady state wave form:
Example 4.1 Cont... – The Prototype
1.4
1.2
1.0
Vbb
0.8
0.6
0.4
V
0.2
0.0
-0.2
Vout
-0.4
Voltage at the base terminal and 50 Ohms load resistor of the fixed frequency oscillator:
-0.6
-0.8
0
10
20
30
40
50
60
70
80
90
100
110
120
Startup transient
ns
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28
Output port
Example 4.2 – 450 MHz CE Fixed Frequency Oscillator Design
0
0
-100
S-PARAMETERS
-500
i
-200
,
V_DC SRC1 Vdc=3.0 V
-300
-1000
Selection of load resistor as in Example 4.1.
,
S_Param SP1 Start=100.0 MHz Stop=800.0 MHz Step=10.0 MHz
-400
) ) 1 1 ( Z ( l a e r
m a g ( Z ( 1 1 ) )
-1500
L LC L=220.0 nH R=
R RB R=47 kOhm
-500
-600
-2000
R RL R=150 Ohm
100
200
300
400
500
600
700
800
C Cc2 C=330.0 pF
freq, MHz
DC_Block DC_Block1
pb_phl_BFR92A_19921214 Q1
0.000
0.020
C C1 C=2.2 pF
Term Term1 Num=1 Z=50 Ohm
0.015
i
-0.005
,
0.010
) ) 1 1 ( Y
C C2 C=4.7 pF
R RE R=220 Ohm
,
-0.010
( l a e r
There are simplified expressions to find C1 and C2, see reference [5]. Here we just trial and error to get some reasonable values.
m a g ( Y ( 1 1 ) )
0.005
-0.015
0.000
100
200
300
400
500
600
700
800
Destabilized amplifier
freq, MHz
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• Small-signal AC or S-parameter analysis, to show that R1 or G1 is negative at the intended oscillation frequency of 450 MHz.
Example 4.2 Cont…
LSSP
Var Eqn
VAR VAR1 Poutv=-10.0
V_DC SRC1 Vdc=3.0 V
LSSP HB1 Freq[1]=450.0 MHz Order[1]=7 LSSP_FreqAtPort[1]= Sw eepVar="Poutv" Start=-5 Stop=15 Step=0.2
L LC L=220.0 nH R=
Since the locus of S11 is close in shape to constant X circles, and it indicates R1 goes from negative value to positive values as input power is increased, we use series form to represent the input network looking towards the Base of the amplifier.
R RB R=47 kOhm
S11
R RL R=150 Ohm
C Cc2 C=330.0 pF
DC_Block DC_Block1
) 1
,
pb_phl_BFR92A_19921214 Q1
C C1 C=2.2 pF
1 ( S
Compare
P_1Tone PORT1 Num=1 Z=50 Ohm P=polar(dbmtow (Poutv),0) Freq=450 MHz
C C2 C=4.7 pF
R RE R=220 Ohm
Boundary of Normal Smith Chart
Poutv (-5.000 to 15.000)
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Direction of S11 as magnitude of P_1tone source is increased from -5 to +15 dBm
29
• The large-signal analysis to check for suitable representation.
Example 4.2 Cont…
VtPWL SRC2 V_Tran=pw l(time, 0ns,0V, 2ns,0.1V, 4ns,0V)
1.0
t
TRANSIENT
0.5
V_DC SRC1 Vdc=3.0 V
0.0
Tran Tran1 StopTime=100.0 nsec MaxTimeStep=1.0 nsec
V
vL(t)
,
L V
L LC L=220.0 nH R=
-0.5
R RB R=47 kOhm
VC
VL
-1.0
R RL R=150 Ohm
VB
C Cc2 C=330.0 pF
-1.5
0
20
40
60
80
100
C Cc1 C=1.0 nF
pb_phl_BFR92A_19921214 Q1
time, nsec
C C1 C=2.2 pF
L L1 L=39.0 nH R=10
Eqn VfL=fs(VL)
m1 450.0MHz freq= mag(VfL)=0.733
m1
0.8
0.6
C C2 C=4.7 pF
R RE R=220 Ohm
|VL(f)|
) L f V
0.4
( g a m
Large coupling capacitor
0.2
0.0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
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freq, GHz
• Using a series RL for the resonator, and performing time-domain simulation to verify that the circuit will oscillate.
Example 4.3 – Parallel Representation
Var Eqn
LSSP
VAR VAR5 Poutv=1.0 fo=2300
LSSP HB1 Freq[1]=fo MHz Order[1]=8 LSSP_FreqAtPort[1]=fo MHz SweepVar="Poutv" Start=-7 Stop=12 Step=0.2
C Cdec1 C=100.0 pF
V_DC VCC Vdc=3.3 V
L LC L=2 nH R=0.2
) 1
,
1 (
R RB1 R=1000 Ohm
S
S11
C Cc2 C=1.0 pF pb_phl_BFR92A_19921214 Q1
R RL R=50 Ohm
Compare
C Cc1 C=1.2 pF
Direction of S11 as magnitude of P_1tone source is increased from -7 to +12 dBm
C C1 C=0.6 pF {t}
P_1Tone PORT1 Num=1 Z=50 Ohm P=polar(dbmtow(Poutv),0) Freq=fo MHz
R RB2 R=1000 Ohm
Poutv (-7.000 to 12.000)
R RE R=100 Ohm
C C2 C=0.7 pF {t}
S11 versus Input power
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30
• An example where the network looking into the Base of the destabilized amplifier is more appropriate as parallel RC network.
Frequency Stability
• The process of oscillation depends on the non-linear behavior of the negative-resistance network.
• The conditions discussed, e.g. equations (3.1), (3.8), (3.9), (3.10) and (3.11) are not enough to guarantee a stable state of oscillation. In particular, stability requires that any perturbation in current, voltage and frequency will be damped out, allowing the oscillator to return to it’s initial state.
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• The stability of oscillation can be expressed in terms of the partial derivative of the sum Zin + Zs or Yin + Ys of the input port (or output port). • The discussion is beyond the scope of this chapter for now, and the reader should refer to [1] and [7] for the concepts.
Some Steps to Improve Oscillator Performance
• To improve the frequency stability of the oscillator, the following steps can be taken. • Use components with known temperature coefficients, especially capacitors. • Neutralize, or swamp-out with resistors, the effects of active device variations due to temperature, power supply and circuit load changes.
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31
• Operate the oscillator on lower power. • Reduce noise, use shielding, AGC (automatic gain control) and bias- line filtering. • Use an oven or temperature compensating circuitry (such as thermistor). • Use differential oscillator architecture (see [4] and [7]).
Extra References for This Section
• Some recommended journal papers on frequency stability of oscillator: • Kurokawa K., “Some basic characteristics of broadband negative
resistance oscillator circuits”, Bell System Technical Journal, pp. 1937- 1955, 1969. • Nguyen N.M., Meyer R.G., “Start-up and frequency stability in high-
frequency oscillators”,IEEE journal of Solid-State Circuits, vol 27, no. 5 pp.810-819, 1992.
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• Grebennikov A. V., “Stability of negative resistance oscillator circuits”, International journal of Electronic Engineering Education, Vol. 36, pp. 242-254, 1999.
Reconciliation Between Feedback and Negative Resistance Oscillator Perspectives
•
V_DC VCC Vdc=3.0 V
V_DC VCC Vdc=3.0 V
Negative Resistance Oscillator
Amplifier
L LC L=2.2 nH {t} R=0.2
L LC L=2.2 nH {t} R=0.2
R RB1 R=10000 Ohm {t}
VL
VL
R RB1 R=10000 Ohm {t}
C Cc2 C=1.0 pF
R RL R=50 Ohm
C Cc2 C=1.0 pF
pb_phl_BFR92A_19921214 Q1
R RL R=50 Ohm
R RE R=100 Ohm {t}
pb_phl_BFR92A_19921214 Q1
C Cc1 C=4.7 pF
C C1 C=1.0 pF {t}
L L1 L=15.0 nH {t} R=0.1
C Cc1 C=4.7 pF
C C1 C=1.0 pF {t}
C C2 C=0.8 pF {t}
C C2 C=0.8 pF {t}
R RE R=100 Ohm {t}
Feedback Network
L L1 L=15.0 nH {t} R=0.1
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32
It must be emphasized that the circuit we obtained using negative resistance approach can be cast into the familiar feedback form. For instance an oscillator circuit similar to Example 4.2 can be redrawn as:
5.0 Voltage Controlled Oscillator
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About the Voltage Controlled Oscillator (VCO) (1)
• A simple transistor VCO using Clapp-Gouriet or CE configuration will be designed to illustrate the principles of VCO. • The transistor chosen for the job is BFR92A, a wide-band NPN transistor which comes in SOT-23 package. • Similar concepts as in the design of fixed-frequency oscillators are
employed. Where we design the biasing of the transistor, destabilize the network and carefully choose a load so that from the input port (Port 1), the oscillator circuit has an impedance (assuming series representation is valid):
)
)
( w
=
( w
+
)w (
jX
R 1
1
Z 1
1 to w
2.
Lower
Upper
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33
• Of which R1 is negative, for a range of frequencies from w
About the Voltage Controlled Oscillator (VCO) (2)
Clapp-Gouriet Oscillator Circuit with Load
Zs ZL
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Z1 = R1 + jX1
About the Voltage Controlled Oscillator (VCO) (3)
1 to w
2:
=
+
jX
R
Z
•
)
( w
( w
=
( w ( w
) )
) )
s ( w
<
If we can connect a source impedance Zs to the input port, such that within a range of frequencies from w ( w s ( w
)
X
X s
1
R 1
s Rs
R 1
)w ( ) 0 < • The circuit will oscillate within this range of frequencies. By changing
The rationale is that only the initial spectral of the noise signal fulfilling Xs = X1 will start the oscillation.
the value of Xs, one can change the oscillation frequency.
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34
• • For example, if X1 is positive, then Xs must be negative, and it can be generated by a series capacitor. By changing the capacitance, one can change the oscillation frequency of the circuit. If X1 is negative, Xs must be positive. A variable capacitor in series with a suitable inductor will allow us to adjust the value of Xs.
Schematic of the VCO
T R ANS IE NT
P ARAM ET ER SWEEP
DC
D C D C1
Initial noise source to start the oscillation
Tran Tran1 StopTim e=100. 0 ns ec MaxTimeS tep=1.2 nsec
VtP WL Vtrig V_Tran=pwl(t ime, 0ns , 0V, 1ns,0. 01V, 2ns ,0V)
t
L Lc L=220.0 nH R=
R Rb R=47 k Ohm
V ar E qn
ParamSweep Sweep1 SweepVar="R load" SimI ns tanc eNam e[1] ="Tran1" SimI ns tanc eNam e[2] = SimI ns tanc eNam e[3] = SimI ns tanc eNam e[4] = SimI ns tanc eNam e[5] = SimI ns tanc eNam e[6] = St art=100 St op=700 St ep=100
VAR VAR 1 X=1. 0 R load=100
V_DC Vcc Vdc =3.0 V
R Rout R=50 O hm
C C c2 C =330. 0 pF
L L2 L=47. 0 nH R =
R RL R=Rload
pb_phl_BF R92A_19921214 Q1
C Cb1 C=2. 2 pF
Variable capacitance tuning network
C Cb3 C=4. 7 pF
R Re R=220 O hm
C Cb2 C=10. 0 pF
di_s ms _bas 40_19930908 D1
R R1 R=4700 Ohm
V _D C S RC1 V dc=-1.5 V
2-port network
C C b4 C =4.7 pF
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More on the Schematic
• L2 together with Cb3, Cb4 and the junction capacitance of D1 can produce a range of reactance value, from negative to positive. Together these components form the frequency determining network. • Cb4 is optional, it is used to introduce a capacitive offset to the junction capacitance of D1. • R1 is used to isolate the control voltage Vdc from the frequency
determining network. It must be a high quality SMD resistor. The effectiveness of isolation can be improved by adding a RF choke in series with R1 and a shunt capacitor at the control voltage. • Notice that the frequency determining network has no actual
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35
resistance to counter the effect of |R1(w )|. This is provided by the loss resistance of L2 and the junction resistance of D1.
Time Domain Result
1.0
0.5
0.0
-0.5
-1.0
-1.5
0
10
20
30
40
50
60
70
80
90
100
Vout when Vdc = -1.5V
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Load-Pull Experiment
5
4
3
Vout(pp)
2
1
100
200
300
500
600
700
800
400 RLoad
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36
• Peak-to-peak output voltage versus Rload for Vdc = -1.5V.
Controlling Harmonic Distortion (1)
• Since the resistance in the frequency determining network is too small,
Vout
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large amount of non-linearity is needed to limit the output voltage waveform, as shown below there is a lot of distortion.
Controlling Harmonic Distortion (2)
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37
• The distortion generates substantial amount of higher harmonics. • This can be reduced by decreasing the positive feedback, by adding a small capacitance across the collector and base of transistor Q1. This is shown in the next slide.
Controlling Harmonic Distortion (3)
TRANSIENT
DC
Capacitor to control positive feedback
DC DC1
Tran Tran1 StopTime=280.0 nsec MaxTimeStep=1.2 nsec
VtPWL Vtrig V_Tran=pwl(time, 0ns, 0V, 1ns,0.01V, 2ns,0V)
t
L Lc L=220.0 nH R=
R Rb R=47 kOhm
I_Probe Iload
I_Probe IC
R Rout R=50 Ohm
C Cc2 C=330.0 pF
V_DC Vcc Vdc=3.0 V
C Ccb C=1.0 pF
L L2 L=47.0 nH R =
R RL R=50 Ohm
C Cb1 C=6.8 pF
pb_phl_BFR92A_19921214 Q1
The observant person would probably notice that we can also reduce the harmonic distortion by introducing a series resistance in the tuning network. However this is not advisable as the phase noise at the oscillator’s output will increase ( more about this later).
C Cb3 C=4.7 pF
R Re R=220 Ohm
C Cb2 C=10.0 pF
Control voltage Vcontrol
R R1 R=4700 Ohm
V_DC SRC1 Vdc=0.5 V
di_sms_bas40_19930908 D1 C Cb4 C=0.7 pF
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Controlling Harmonic Distortion (4)
Vout
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• The output waveform Vout after this modification is shown below:
Controlling Harmonic Distortion (5)
• Finally, it should be noted that we should also add a low-pass filter
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(LPF) at the output of the oscillator to suppress the higher harmonic components. Such LPF is usually called Harmonic Filter. • Since the oscillator is operating in nonlinear mode, care must be taken in designing the LPF. • Another practical design example will illustrate this approach.
The Tuning Range
410
405
f
MHz
D1 is BB149A, a varactor manufactured by Phillips Semiconductor (Now NXP).
400
395
0
0.5
1
1.5
2
2.5
Vdc Volts
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• Actual measurement is carried out, with the frequency measured using a high bandwidth digital storage oscilloscope.
Phase Noise in Oscillator (1)
• Since the oscillator output is periodic. In frequency domain we would
•
=
( w
q ++
q
( ) t
( + mV
v
( ) ) t
cos
t
)t ( )
o
osc
noise
noise
expect a series of harmonics. In a practical oscillation system, the instantaneous frequency and magnitude of oscillation are not constant. These will fluctuate as a function of time.
t
f
Ideal oscillator output
fo
2fo
3fo
Smearing
t
Real oscillator output
f
fo
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2fo
3fo
• These random fluctuations are noise, and in frequency domain the effect of the spectra will ‘smear out’.
Phase Noise in Oscillator (2)
Leeson’s expression
T = 1/fo
v(t)
f
o
• Mathematically, we can say that the instantaneous frequency and magnitude of oscillation are not constant. These will fluctuate as a function of time.
[
]2 )
10
log
PML
FkT A
1 Q
8
f
L
offset
t
f
fo
Large phase noise
v(t)
Contains both phase and amplitude modulation of the sinusoidal waveform at frequency fo
t
f
fo
Small phase noise
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40
• As a result, the output in the frequency domain is ‘smeared’ out. ( (cid:215) (cid:215) (cid:181)
Phase Noise in Oscillator (3)
Signal level
q ++
• Typically the magnitude fluctuation is small (or can be minimized) due to the oscillator nonlinear limiting process under steady-state. • Thus the smearing is largely attributed to phase variation and is known as Phase Noise. • Phase noise is measured with respect to the signal level at various
t
)t ( )
V o
v osc
noise
v(t)
- 90dBc/Hz
t
100kHz
f
fo
• Phase noise is measured in dBc/Hz @ foffset. • dBc/Hz stands for dB down from the carrier (the ‘c’) in 1 Hz bandwidth. • For example -90dBc/Hz @ 100kHz offset from a CW sine wave at 2.4GHz.
Assume amplitude limiting effect Of the oscillator reduces amplitude fluctuation
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@ offset frequencies. ( ( ) w q cos t
Reducing Phase Noise (1)
• Requirement 1: The resonator network of an oscillator must have a high
Xtune
Variation in Xtune due to environment causes small change in instantaneous frequency.
X1
X1
Tuning Network with High Q
Tuning Network with Low Q
Q factor. This is an indication of low dissipation loss in the tuning network (See Chapter 3a – impedance transformation network on Q factor). Xtune
f
f
f
f
2D
-X1
|X1|
2D
|X1|
-X1 Ztune = Rtune +jXtune
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41
D D
Reducing Phase Noise (2)
• A Q factor in the tuning network of at least 20 is needed for medium
performance oscillator circuits at UHF. For highly stable oscillator, Q factor of the tuning network must be in excess or 1000.
• We have looked at LC tuning networks, which can give Q factor of up to 40. Ceramic resonator can provide Q factor greater than 500, while piezoelectric crystal can provide Q factor > 10000. • At microwave frequency, the LC tuning networks can be substituted with transmission line sections.
• See R. W. Rhea, “Oscillator design & computer simulation”, 2nd edition 1995, McGraw-Hill, or the book by R.E. Collin for more discussions on Q factor. • Requirement 2: The power supply to the oscillator circuit should also
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be very stable to prevent unwanted amplitude modulation at the oscillator’s output.
Reducing Phase Noise (3)
• Requirement 3: The voltage level of Vcontrol should be stable. • Requirement 4: The circuit has to be properly shielded from electromagnetic interference from other modules. • Requirement 5: Use low noise components in the construction of the
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oscillator, e.g. small resistance values, low-loss capacitors and inductors, low-loss PCB dielectric, use discrete components instead of integrated circuits.
Example of Phase Noise from VCOs
VCO output with high phase noise
VCO output with low phase noise
*The spectrum analyzer internal oscillator must of course has a phase noise of an order of magnitude lower than our VCO under test.
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• Comparison of two VCO outputs on a spectrum analyzer*.
More Materials
• This short discussion cannot do justice to the material on phase noise. • For instance the mathematical model of phase noise in oscillator and
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the famous Leeson’s equation is not shown here. You can find further discussion in [4], and some material for further readings on this topic: – D. Schere, “The art of phase noise measurement”, Hewlett Packard RF & Microwave Measurement Symposium, 1985. – T. Lee, A. Hajimiri, “The design of low noise oscillators”, Kluwer, 1999.
More on Varactor
• The varactor diode is basically a PN junction optimized for its linear
Vj
Reverse biased
Cj
Linear region
Cjo
Forward biased
• As we increase the negative biasing voltage Vj , Cj decreases, hence the oscillation frequency increases. • The abrupt junction varactor has high Q, but low sensitivity (e.g. Cj varies little over large voltage change). • The hyperabrupt junction varactor has low Q, but higher sensitivity.
Vj
0
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• junction capacitance. It is always operated in the reverse-biased mode to prevent nonlinearity, which generate harmonics.
A Better Variable Capacitor Network
• The back-to-back varactors are commonly employed in a VCO circuit, so that at low Vcontrol, when one of the diode is being affected by the AC voltage, the other is still being reverse biased.
• When a diode is forward biased, the PN junction capacitance becomes
nonlinear.
• The reverse biased diode has smaller junction capacitance, and this dominates
the overall capacitance of the back-to-back varactor network. • This configuration helps to decrease the harmonic distortion.
To negative resistance amplifier
To suppress RF signals
Vcontrol
To suppress RF signals
+
Vcontrol
+ Vcontrol
Symbol for Varactor
At any one time, at least one of the diode will be reverse biased. The junction capacitance of the reverse biased diode will dominate the overall capacitance of the network.
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Example 5.1 – VCO Design for Frequency Synthesizer
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• To design a low power VCO that works from 810 MHz to 910 MHz. • Power supply = 3.0V. • Output power (into 50Ω load) minimum -3.0 dBm.
Example 5.1 Cont…
S-PARAMETERS
DC
DC DC1
S_Param SP1 Start=0.7 GHz Stop=1.0 GHz Step=1.0 MHz
V_DC SRC1 Vdc=3.3 V
b82496c3120j000 LC param=SIMID 0603-C (12 nH +-5%)
R RB R=33 kOhm
100pF_NPO_0603 Cc2
pb_phl_BFR92A_19921214 Q1
4_7pF_NPO_0603 Cc1
2_2pF_NPO_0603 C1
R RL R=100 Ohm
Term Term1 Num=1 Z=50 Ohm
3_3pF_NPO_0603 C2
R RE R=100 Ohm
Z11
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• Checking the d.c. biasing and AC simulation.
Example 5.1 Cont…
809.0MHz
775.0MHz
m2 freq= m2=-84.412
m1 freq= m1=-89.579
-40
-50
-60
-70
m2
-80
m1
) ) 1 , 1 ( Z ( l a e r
) ) 1 , 1 ( Z ( g a m
i
-90
-100
-110
-120
0.70
0.72
0.74
0.76
0.78
0.80
0.82
0.84
0.86
0.88
0.90
0.92
0.94
0.96
0.98
1.00
freq, GHz
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• Checking the results – real and imaginary portion of Z1 when output is terminated with ZL = 100Ω.
Example 5.1 Cont…
S-PARAMETERS
PARAMETER SWEEP
Var Eqn
VAR VAR1 Vcontrol=0.2
S_Param SP1 Start=0.7 GHz Stop=1.0 GHz Step=1.0 MHz
ParamSweep Sweep1 SweepVar="Vcontrol" SimInstanceName[1]="SP1" SimInstanceName[2]= SimInstanceName[3]= SimInstanceName[4]= SimInstanceName[5]= SimInstanceName[6]= Start=0.0 Stop=3 Step=0.5
L L1 L=10.0 nH R=
Vvar
C C3 C=0.68 pF
Term Term1 Num=1 Z=50 Ohm
V_DC SRC1 Vdc=Vcontrol V
BB833_SOD323 D1
L L2 L=33.0 nH R= 100pF_NPO_0603 C2
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• The resonator design.
Example 5.1 Cont…
-X1 of the destabilized amplifier
120
882.0MHz
100
m1 freq= m1=64.725 Vcontrol=0.000000
80
) ) 1 , 1 ( Z
m1
60
. . c a _ O C V
) ) 1 , 1 ( Z ( g a m
i
40
( g a m
i -
The theoretical tuning range
20
0
Resonator reactance as a function of control voltage
0.70
0.75
0.80
0.85
0.90
0.95
1.00
freq, GHz
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• The resonator reactance.
Example 5.1 Cont…
t
TRANSIENT
DC
Low-pass filter
DC DC1
VtPWL Src_trigger V_T ran=pwl(time, 0ns,0V, 1ns,0.1V, 2ns,0V)
Tran Tran1 StopT ime=1000.0 nsec MaxTimeStep=1.0 nsec
V_DC SRC1 Vdc=3.3 V
b82496c3120j000 L3 param=SIMID 0603-C (12 nH +-5%)
R RB R=33 kOhm
b82496c3150j000 L4 param=SIMID 0603-C (15 nH +-5%)
100pF_NPO_0603 Cc2
b82496c3100j000 L1 param=SIMID 0603-C (10 nH +-5%)
pb_phl_BFR92A_19921214 Q1
4_7pF_NPO_0603 Cc1
0_47pF_NPO_0603 C9
C C6 C=2.2 pF
R RL R=100 Ohm
2_7pF_NPO_0603 C8
b82496c3330j000 L2 param=SIMID 0603-C (33 nH +-5%)
C C5 C=0.68 pF
Vvar
BB833_SOD323 D1
C C7 C=3.3 pF
R R1 R=100 Ohm
V_DC SRC2 Vdc=1.2 V
R RE R=100 Ohm
100pF_NPO_0603 C4
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• The complete schematic with the harmonic suppression filter.
Example 5.1 Cont…
VCO
Harmonic suppression filter
Fundamental -1.5 dBm
- 30 dBm
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• The prototype and the result captured from a spectrum analyzer (9 kHz to 3 GHz).
Example 5.1 Cont…
-0.42 dBm
Span = 500 kHz RBW = 300 Hz VBW = 300 Hz
300Hz
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• Examining the phase noise of the oscillator (of course the accuracy is limited by the stability of the spectrum analyzer used).
Example 5.1 Cont…
V_DC SRC1 Vdc=3.3 V
b82496c3120j000 L3 param=SIMID 0603-C (12 nH +-5%)
R RB R=33 kOhm
b82496c3150j000 L4 param=SIMID 0603-C (15 nH +-5%)
100pF_NPO_0603 Cc2
b82496c3100j000 L1 param=SIMID 0603-C (10 nH +-5%)
Variable power supply
R Rattn R=50 Ohm
Spectrum Analyzer
Port Vout Num=2
pb_phl_BFR92A_19921214 Q1
4_7pF_NPO_0603 Cc1
0_47pF_NPO_0603 C9
C C6 C=2.2 pF
2_7pF_NPO_0603 C8
C C5 C=0.68 pF
Vvar
BB833_SOD323 D1
C C7 C=3.3 pF
R Rcontrol R=1000 Ohm
Port Vcontrol Num=1
R RE R=100 Ohm
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• VCO gain (ko) measurement setup:
Example 5.1 Cont…
fVCO / MHz
950
900
850
= =
74.40 74.40
MHz/Volt MHz/Volt
@ok @ok
800
55 55 35.1 35.1
MHz MHz Volt Volt
750
Vcontrol/Volts
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
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• Measured results:
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