Master's thesis of Engineering: Radiation hard FPGA configuration techniques using silicon on sapphire

Once entirely the domain of space-borne applications, the effects of high energy charged particles on electronics systems is now also a concern for terrestrial devices. Reconfigurable components such as FPGAs are particularly vulnerable to radiation single event effects (SEU) as they carry a large amount of memory within a relatively small amount of circuit area. This thesis presents a Silicon on Insulator (SOI) based configuration memory system in a radiation hard reconfiguration system. The SOI technology used in this particular work is Silicon on Sapphire, where Sapphire is used as the body insulator.