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SOI waveguide
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In this paper, we present a numerical simulation design of a 1:2 power splitter optical circuit with an evenly distributed 50:50 splitting ratio for all three modes simultaneously. The proposed design is based on the SOI material platform with wafers having a silicon layer thickness of 220nm, in accordance with VLSI chip manufacturing technology standards.
9p
vithomson
02-07-2024
0
0
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Designing an ultra compact triplexer based on two staggered ring resonators using silicon waveguides
In this paper, we present a novel structure for ultra-compact triplexer by using two staggered ring resonators that are coupled with straight directional couplers based on submicron waveguides.
4p
vilexus
05-10-2022
8
4
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In this report, we present the design and the numerical investigation of the mode property of SOI photonic crystal waveguide (SOI PCWs) operating in telecommunication range, i.e., O-band (1260 – 1360 nm) with TE polarization. The SOI PCWs including conventional W1 and slot SOI PCWs have been designed to exploit two kinds of mode: W1-like and true-slot. For that purpose, the geometric parameters of the SOI PCW with the triangular PhC structure are chosen as follows.
7p
nguyenminhlong19
22-04-2020
30
0
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This paper presents an optimized design for racetrack resonators based on Multimode Interference (MMI) couplers on the silicon on insulator (SOI) platform. The design approach takes into account the effects of bend and transition losses within the racetrack waveguide. For the first time, new positions and geometries of access waveguides are suggested and optimized to improve device performance.
9p
blossom162
07-01-2019
35
4
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A novel design of devices based on the thermo-optic effect in silicon on insulator (SOI) waveguides is presented. In order to evaluate accurately the temperature distribution and speed of the device, the heat transfer equation is to be solved numerically. It will be shown in this paper how the new thermo-optic waveguide structure, in which air trenches are made, can improve the performance of the thermo-optic device. In addition, a new formula for calculating the phase shift induced by the thermo-optic effect is proposed.
10p
dannisa
14-12-2018
29
0
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In this paper, we introduce a new two-mode (de)multiplexer based on the silicon-oninsulator (SOI) platform. The device is built on a symmetric Y-junction, a 2×2 multimode interference (MMI) waveguide and a phaseshifter in the form of a ridge waveguide which is designed using 3D scalar beam propagation method (BPM). The phase evolution in the structure is discussed in details.
12p
thuyliebe
08-10-2018
29
2
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In the MEMS industry, systems for deep reactive-ion etching (DRIE) utilize fast pumping, fast-response mass-flow controllers inductive coupling of power, and heated chamber and pump lines that are critical to achieve reliable etch rates. In contrast, we have achieved 8:1 aspect-ratio PhC structures with 62nm vertica membrane walls using a standard reactive-ion etching process based on a sidewall passivation processes. In the remainder of this section we discuss this fabrication process.
16p
quynho77
13-11-2012
42
0
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To maximize the extent of the photonic bandgap in a finite-height photonic-crystal (PhC) slab one can increase the fill-factor in the PhC lattice. Among the realistic choices of possible 2D lattices, high fill- factor triangular lattices of cylindrical holes in a high index dielectric, namely silicon, are by far the most commonly used. In this paper, we present a method for fabrication of very high fill-factor PhC devices in silicon-on-insulator (SOI) substrates using electron-beam lithography and high-aspect-ratio reactive-ion etching (RIE).
12p
quynho77
13-11-2012
50
0
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