State diagram of elevator
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Lecture Digital Logic & Design: Lesson 36 provide students with knowledge about boolean expression for D2 inputs; 3-bit up/down counter; input/output pin definition of 3-bit up/down counter; equation definition of 3-bit up/down counter; test vector definition of 3-bit up/down counter;...
24p 
hanthienngao
15-04-2022
14
1
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Lecture Digital Logic & Design: Lesson 37 provide students with knowledge about SR1 latch which stores the status of the REQ1, FLOOR1 and OPEN buttons; simplified state table for elevator control for REQ1, FLOOR1 and OPEN inputs; modified block diagram of the elevator state machine;...
23p hanthienngao
15-04-2022
13
1
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