Summary of technical phd thesis: Research some solutions to improve the quality of signal receiver in radar

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The study of technical solutions to improve the quality of the radar receiver through research to improve the quality of some modules in receiver in order to enhance sensitivity, reduce the phase noise, enhance stability and improve quality receiver signal of radar.

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Ministry of EDUCATION AND TRAINING Ministry of Defence Academy of Military Science and Technology *********** HANH NGUYEN VAN RESEARCH SOME SOLUTIONS TO IMPROVE THE QUALITY OF SIGNAL RECEIVER IN RADAR. Speciality : Electronic Engineering Code : 62 52 02 03 SUMMARY OF TECHNICAL PHD THESIS HA NOI - 2014
ii The project was finished at: Academy of Military Science and Technology Scientific supervisors: 1. Dr. Minh Nguyen Thi Ngoc 2. Dr. Quang Chu Xuan 1st Reviewer: Ass. Prof. Dr. Tu Hoang Tho, Military Technical Academy 2nd Reviewer: Ass. Prof. Dr. Yem Vu Van, Hanoi University of Science and Technology 3rd Reviewer: Dr. Hung Tran Van, Academy of Military Science and Technology The thesis is defended at the Council of Academy for thesis evaluation, meeting at the Academy of Military Science and Technology on.......... 2014. Thesis can be found at: The Library of Academy of Military Science and Technology The National Library of Vietnam
1 INTRODUCTION * Urgency of topic: Upgrading and modernization of radar in our military equipment is one of the most important tasks of the offices working in research and ensure technical for radar. At present, application of new technology components and have a scientific basis to the existing radar station is the right direction and in accordance with the military situation. The need for improvement and modernization radar in the Army is so great that the radar are mainly the older generation. Not only difficulty about supplies and technical equipment which sources of information theory, technology, radar technology from the former Soviet Union and Eastern Europe decreased significantly, from other countries is very limited. Military radar receiver compared to the civil radar receivers have techniques to synthesize, complex and specific characteristics. Although it is not a new problem both in theory and fabrication technology, but related to the military secrets of the most developed countries as well as the commercial product should be very difficult to reach and update the relevant documents. The quality of the receiver plays a crucial role in the manufacturing radar. So, the study found solutions to improve the quality of the radar receiver is a critical need and are practical in terms of our country is building plan make radar. * The goal of the thesis: The study of technical solutions to improve the quality of the radar receiver through research to improve the quality of some modules in receiver in order to enhance sensitivity, reduce the phase noise, enhance stability and improve quality receiver signal of radar. * Object and range of the study: The thesis is no mention at antenna and signal processing, only limited research some technical solutions to improve the quality of the module at the top of the most radar receiver in military (focused on microwave) and will focus on two main issues: 1. Research solutions to improve the quality of the receiver input protection of current military radar is to enhance sensitivity; 2. Research technical solutions to enhance stability and reduce the phase noise of radar receiver, namely: to enhance stability, reduce the phase noise of the VCO using one or more Phase Lock Loops (PLL).
2 * Research method: Research method of the thesis is investigate and analyze advantages and disadvantages of the existing radar receiver, apply microwave circuit theory, low noise receiver, the models and methods of phase noise analysis, technology selection and advanced techniques, using the ADS software, the integrated circuit and modern instrumentation to synthesize stages need to improve quality. Then evaluation measured in the laboratory and on the radar works in long time. * The science and practice significance: + The science significance: The thesis focus research application of advanced microwave components, new technology solutions to improve the quality of the military radars receiver currently. This is a creative direction and in accordance with the situation of the most equipment in our army currently. + The practical significance: The results of theoretical research and empirical of this thesis and is capable of practical application in the maintenance of technical assurance, longevity, improvements, upgrades existing radar and programs catering to develop some new types of radar. * The structure of the thesis: The thesis consists 118 pages; including 14 tables; 58 graphs, figures; 85 references and 5 appendix pages. Chapter 1 study overview the structure of a radar receiver and analysis depthly of the advantages and disadvantages of each type of structure. Chapter 1 also presents the main technical requirements for radar receiver and situation analysis overview study of radar receiver in the country and abroad, from which the assessment for the proposed research content thesis. Chapter 2 details the scientific basis and methodology related to two new technical solutions to improve the quality of a radar receiver in the proposed. The first part of the survey overview of the microwave power limiter using semiconductor, then go deep to present new technical solutions have been applied to design the power limiter using PIN diode protect LNA not been breached by the leakage power after transceiver switch. The following section focused on the oscillator VCO using transistors is applied as local oscillator in radar. Survey oscillator models using transistor, noise models, amplitude modulated (AM) and phase modulation (PM) noise at the output of the
3 oscillator using transistor. It also presents the noise of the VCO when combined with PLL circuit with 7 noise sources. Finally, chapter 3 presents the results of experimental studies. CHAPTER 1: OVERVIEW OF A RADAR RECEIVER Antenna 1.1. Configuration and structure of a Receiver STC & AGC STC input radar receiver [55]: control attenuator Single Duplexer receiver The function of a radar receiver is LNA channel replicated Power amplifier N times to amplified, filter, downconvert and Bandpass Bandpass filter filter transformed into digitized frequency Mixer signal response of radar signal STALO Mixer transmitter to ensure that best distinguish Bandpass filter Bandpass filter the desired signal reflection on the noise IF amplifier Reference oscillator floor. A block diagram of the basic DDS AGC configuration radar receiver in figure 1.1. attenuator Clock On the basis of the basic configuration of IF Limiter IF Limiter generator A/D the radar receiver, can form different ADC A/D Clock I/Q Demodulator COHO Clocks structures receiver: superheterodyne DDC ADC ADC A/D A/D Clock Clock receiver, direct- conversion receiver, low I Q I Q Data to DSP intermediate frequency receiver and Figure 1.1: General configuration multi-channel wideband receiver. of a radar receiver. 1.2. The main technical requirements of a radar receiver Includes: Noise [47] and sensitivity of a receiver, sensitivity recovery time of a receiver, amplification coefficient [47], dynamic range and linearity, accuracy and frequency stability [55],.... This is the radar receiver so the receiver bandwidth depends on the structure of the received signal. 1.3. Building the research content of the thesis 1.3.1. Current status of the radar in Army Actually, the radar in Viet Nam have following characteristics: many in number, diversity in types. The first generation of radar used since the 70 years, with the old technology, the single- pulse radar (using simple signals), also known as narrow-band signals, approximately 90 %. With a small pulse width, to ensure far detection range then the pulse peak power must be very
4 large. Therefore transmission line systems, transceiver switch are often damaged due to ignition. According to experts, the technical status of the radar station has many weaknesses, high cumulative number of hours, the ability to ensure for technical is limited due to lack of alternative components leading to reduced technical parameters [8]. Facing this reality, the need for improvement and modernization radar in the Army is so great that the radar are mainly the older generation. 1.3.2. Development trends of radar receiver system 1.3.3. Overview of research 1.3.4. Regarding the quality of radar receiver: In normal operating conditions, at input of radar receiver have some following signals: a) the echo signal from target, normally calls useful signal; b) the echo signal from noise, usually from fixed objects, such as ground surface, sea surface, meteorology objects; c) the leakage signal from transmitter to receiver; d) the strong signal from the electronic radio equipment operating nearby on the same frequency or the echo signal from the large geophysical nearby. Thus, the quality of radar receivers must be considered depending on the type of signal to the receiver. 1.3.5. The research content of the thesis: Starting from the need to ensure the work meets specifications for radar system of our Army, in accordance with the situation and development trend of the radar receiver system in the world, Research Student building contents of the thesis research solve two problems related to microwave techniques: 1. Limiting the power of the signal intensity go to a receiver: Solutions to improve the receiver quality when the impact of intense signals entered on the receiver by using the combined a power limiter and LNA; 2. Enhance stability and reduce the phase noise of the local oscillator: By enhancing stability and reducing the phase noise of the oscillator VCO combined use of one or more PLL. The conclusion of chapter 1: 1. Having studied the basic configuration overview of the radar receiver and the receiver structure of radar and in depth analysis of the advantages and disadvantages of each type of structure;
5 2. From the main technical requirements for receiver, we have two methods that enhance receiver sensitivity, which are: reduce noise figure by using LNA or narrow bandwidth of a receiver determined by the width of the signal spectrum was obtained. CHAPTER 2: SOME SOLUTIONS TO IMPROVE THE QUALITY OF THE RADAR RECEIVER 2.1. Limiting the power of the signal intensity go to a receiver 2.1.1. The function of a power limiter in radar A block diagram of the radar receiver system shows in figure 2.1. In the lead the way radar works in cm wave, average leakage power after transceiver switch is large relatively, about: Paverage = 200 mW - 1000 mW Figure 2.1: The block diagram of the radar receiver. (depending on the quality of the transceiver switch and power transmit of each channel). To put LNA replacement UV-99 is to protect the LNA was not damage by leakage power. It has been brought to the power limiter between transceiver switch and LNA, protecting the amplifier is not damaged. 2.1.2. Microwave power limiter using semiconductor: Microwave limiter or protector typically used to manage receiver saturation and block high power of transmitter not damage the radar receiver. The Figure 2.3: The transceiver switch using semiconductor power limiting circuit are mounted after transceiver switch. Two kinds of typical transceiver switch is described in figure 2.3, limiting power of the transmitter to the receiver but for low level signals from the receiver through antenna [51]. A microwave limiter is often
6 used in practice: passive varactor limiter, PIN diode limiter, false active PIN diode limiter and Varactor PIN limiter. 2.1.3. Proposed a power limiter with high effective Attenuation of power limiter as a function of bias voltage for PIN diode. At microwave when biased, impedance of PIN diode becomes very small and when power supply off, its impedance becomes very large, it acts as a high frequency switching. Loss of the limiter without biasing for PIN diode: 2 Z0 [ dB ] ( 2.5 ) Ap min 10lg 1 2 Rp Attenuation of limiter when biased for PIN diode: 2 Z0 [ dB ] ( 2.6 ) As max 10 lg 1 2 Rs Power limiter is designed consits of four stage (see figure 2.10). When power of the transmitter to leak large, passive limited circuit with multipler/divider power (1) will have the task of cutting the peak of the leakage pulse and when there is no power, limiting circuit for passing signals with loss less than 1 dB. When a large power go to, output of passive limiting circuit will be attenuated greater than 20 dB. Passive limiting circuit based on the interdigital bandpass filter (2), when power of the transmitter to leak large go to, it will transform from the interdigital filter into the combline filter, response of the filter will be deviated to double carrier frequency and thus during the pulse time (with large leakage pulse), the receiver will almost entirely closed. Passive Passive The limited limiting circuit shunted passive Active circuit based on the limiting limiting To LNA After with interdigital circuit (4) transceiver multipler/ 20 dB BPF (2) circuit switch divider Directi- (3) power (1) onal Control pulse coupler Detector +12 V Figure 2.10: The block diagram of power limiter.
7 Principle switching bandwidth of the interdigital filter into combline filter: Passive circuit limited made on the interdigital filters is designed based on the properties of the two filters combined with the effect of PIN diode with a large and small microwave power go through. When have a greater microwave power go to, make change the structure of the filter, then the electrical length of the magnetic resonant bar from g/4 of the interdigital filter to g/8 of the combline filter (frequency resonant of the filter increased to 2 times). As a result, the bandwidth of the filter when the large microwave power go to will be deviated to 2fo. With this method, we have limited leakage power during transmit time. On the other hand, during receive time, the received signal is very small, characteristics of the filter will not be changed, so that the received signal is less loss (equal the loss of the BPF), so will not affect sensitivity of the receiver. The shunted passive limiting circuit (3) is to limiting leakage power levels below 22 dBm. Acive circuit (4) is controlled following detection pulse. At the output of the passive limited circuit with multipler/divider power (1), we design a 20 dB directional coupler and use this energy to generate pulse to control acive PIN diode. Acive limiting circuit is responsible for continue to limit the leakage pulse while transmitter and be worked sync with excited pulse therefore can be able to completely reject the leakage pulse of the transmitter after transceiver switch. 2.1.4. Calculating the parameters of the power limiter: When designing the power limiter, the most important is to calculate the parameters of the interdigital filter. When calculating the design of the interdigital filter, should be carried out according to the following steps [42]: - Calculation of electrical parameters; - From electrical parameters are calculated, determine the geometric parameters of the interdigital filter. The formulas from (2.7) to (2:15) helps us calculate the geometric parameters of the interdigital filter. 2.2. Enhance frequency stability and reduce the phase noise of the local oscillator 2.2.1. Frequency stability of the oscillator VCO: Frequency stability is the issue key when designing the oscillator using transistor. Frequency stability of
8 the oscillator is a function of many factors such as: temperature, power supply quality, load impedance, mechanical shaking, gravity, aging and noise of the component [50]. The frequency stability unstability of the VCO affect the speciality parameters of the other components in the system and even affect the input system. Effect of the VCO phase noise in the receiver reduces the SNR and receiver sensitivity [41]. Frequency stability have main methods follow [16], [35], [54], [76]. In addition to the methods frequency stability above are also some other methods [45], [72].... 2.2.2. Noise generation in oscillators: The physical effects of random fluctuations taking place in the circuit are different depending on their spectral allocation with respect to the carrier: + Noise components at low-frequency deviations result in frequency modulation of the carrier through a mean-square frequency fluctuation proportional to the available noise power; + Noise components at high-frequency deviations result in phase modulation of the carrier through a mean-square phase fluctuation proportional to the available noise power. 2.2.3. Study noise amplitude modulation (AM) and phase modulation (PM) in the output oscillator use transistor: Two important linear noise models are necessary to understand the SSB noise: One is the Leeson phase noise [33] and the other is based on the Lee and Hajimiri noise model [17]. Noise theory can be divided into modulation noise and conversion noise. 2.2.3.1. Noise Due to Modulation and Conversion in Oscillators. 2.2.3.2. Modulation by a noise signal 2.2.3.3. Oscillator Noise Models At present, two separate but closely related models of oscillator phase noise exist. The ﬁrst is proposed by Leeson, referred to as Leeson’s model and the noise prediction using Leeson’s model is based on time-invariant properties of the oscillator such as Q resonator, feedback gain, output power and noise ﬁgure. a. Leeson noise model: Overall noise of Leeson introduced a linear approach for the calculation of oscillator phase noise:
9 2 1 1 f FkT fc FkT 1 f 0 f c 1 f fc ( fm ) 1 2 ( 0 )2 (1 ) ( 0 )2 1 (2.51) 2 f m 2QL Pavs fm 2 Pavs f m3 4QL2 2 f m 2QL fm The phase noise of a VCO is now determined by: f 02 fc FkT 2kTRK 02 ( f m ) 10 log 1 (1 ) (2.52) (2 f mQL ) 2 f m 2 Pavs (1 QL / Q0 ) f m2 Shortcomings of modiﬁed Leeson noise equation: + The noise ﬁgure F is empirical, a priori, and difﬁcult to calculate due to the linear time-variant (LTV) characteristics of the noise; + Phase noise in the 1/f3 region is an empirical expression with ﬁtting parameters. When adding an isolating ampliﬁer, the noise of an LC oscillator is determined by: 2 2 aR f 04 aE f 0 /(2QL ) (2GFkT / P0 ) f 0 /(2QL ) 2aR QL f 03 a 2GFkT S ( fm ) 3 2 [ E ] (2.53) f m f m f m2 fm P0 Examining (2.53) gives the four major causes of oscillator noise: the up- converted 1/f noise or ﬂicker FM noise; the thermal FM noise; the ﬂicker phase noise, and the thermal noise ﬂoor, respectively. b. Lee and Hajimiri noise model [17]: The second noise model was proposed by Lee and Hajimiri and is based on the time-varying properties of the oscillator current waveform. The equations (2.54) and (2.55) presents phase noise for the 1/f3 and 1/f2 regions. Shortcomings of Lee and Hajimiri noise model: + The ISF function is tedious to obtain and depends upon the topology of the oscillator; + It is mathematical yet lacks practicality; + The 1/f noise conversion is not clearly speciﬁed. 2.2.3.4. Nonlinear approach for computation of noise analysis of oscillators 2.2.3.5. Conversion noise: The PM noise, AM noise and PM–AM correlation coefﬁcient due to frequency conversion can be expressed in terms of a simple algebraic combination of equations from (2.68) to (2.70). PM noise for the kth harmonic can be expressed as: ss 2 Nk ( ) N k ( ) 2 Re Ck , k ( ) exp( j 2 k ) ck ( ) (2.71) ss 2 RI k AM noise for the kth harmonic can be expressed as:
10 ss 2 Nk ( ) N k ( ) 2 Re Ck , k ( ) exp( j 2 k ) (2.72) Ack ( ) 2 ss 2 RI k The PM–AM correlation coefﬁcient for the kth harmonic can be expressed as: ss 2 Im[Ck , k ( ) exp( j 2 k )] j[ N k ( ) N k ( )] CckPM AM ( ) ck ( ) Ak ( )* 2 (2.77) R | I kss |2 2.2.3.6. Modulation noise: The PM noise, AM noise and PM–AM correlation coefﬁcient due to noise modulation can be expressed in terms of a simple algebraic combination of equations from (2.78) to (2.83). PM noise for the kth harmonic can be expressed as: 2 k2 mk ( ) 2 [TF | J H ( ) J H ( ) | TF ] (2.84) AM noise for the kth harmonic can be expressed as: 2 2 Amk ( ) [TAK | J H ( ) J H ( ) | TAK ] (2.86) | I kss |2 The PM–AM correlation coefﬁcient for the kth harmonic can be expressed as: PM AM * k 2 Cmk ( ) k ( ) Ak ( ) [TF J H ( ) J H ( ) TAK ] (2.89) j | I kss | 2.2.4. Noise of the oscillator with PLL [36] 2.2.4.1. Introduction of PLL: The basic elements of PLL include phase detector, frequency divider, low pass ﬁlter (active or passive) and voltage controlled oscillator. In fractional-N PLLs, the divider ratio is controlled by an - (SDM). 2.2.4.2. Phase noise power spectral density: The phase noise PSD at the PLL output is the superposition of the seven mentioned noise contributions (reference noise, reference input buffer noise, VCO noise, loop ﬁlter noise, charge pump device noise, Σ - ∆ quantization noise and phase detector noise), each multiplied by its speciﬁc noise transfer function. The equations from (2.93) to (2.126) present analysis and calculations 7 sources. 2.2.4.3. PLL phase noise spectrum: Since the noise sources are uncorrelated, the corresponding noise spectrum must be added to obtain the total phase noise spectrum at the PLL output given by: out out out out out out out out S ( f ) SREF ( f ) SBUF ( f ) SVCO ( f ) SFIL ( f ) SCP ( f ) SSDM ( f ) SPD ( f ) (2.127) Figure 2.21 and 2.22 show of the phase noise spectrum for a 10 GHz
11 frequency synthesizer with one and two PLL [36]. Figure 2.23 compares the phase noise spectrum (between one and two phase lock loop). Phase noise [dBc/Hz] Phase noise [dBc/Hz] Phase noise [dBc/Hz] Frequency offset [Hz] Frequency offset [Hz] Frequency offset [Hz] Figure 2.21: Phase noise Figure 2.22: Phase noise Figure 2.23: Compare the phase spectrum for a 10 GHz frequencyspectrum for a 10 GHz frequency noise spectrum (between one synthesizer with one PLL synthesizer with two PLL and two PLL). The conclusion of chapter 2: 1. Through survey and analysis of the microwave power limiter using semiconductor, researchers have proposed a technical solution design power limiter protects a receiver in the lead the way radar. Limiter is designed with four stages and works semi active - passive; 2. Having two new technical solutions are applied in the power limiter using PIN diodes: a) Use an passive limiting circuit based on the interdigital bandpass filter combined with effect of PIN diodes; b) Use an active limiting circuit is controlled by quasi-active; 3. Through survey research noise and noise models for the oscillator using transistor, has gived four major causes of oscillator noise: the up-converted 1/f noise or flicker FM noise; the thermal FM noise; the flicker phase noise and the thermal noise floor, respectively. To minimize the phase noise when designing the oscillator using transistor, should note six rules: a) It should be designed so that the resonant circuit has unloaded Q maximum; b) Choose an active device with the lowest noise figure under high-current operation. By doing so, the flicker corner frequency impact is reduced. On the other hand, the device should really produce 10 to 15 dBm output so that the signal-to-noise radio is high. If more aggressive devices are used, typically the phase noise suffers; c) Phase perturbation can be minimized by using high-impedance devices, where the signal-to-noise ratio or the signal voltage relative to the equivalent noise voltage can be made very high; d) Choose an active device with low flicker noise. The effect of flicker noise can be reduced by RF feedback. The proper bias point of the active device is important, and precautions should be taken to prevent modulation of the input
12 and output dynamic capacitance of the active device, which will cause amplitude-to-phase conversion and therefore introduce noise; e) The energy should be coupled from the resonator rather than nother portion of the active device so that the resonator limits the bandwidth because the resonator is also used as a filter; f) Finally, a combination of proper resonator and dc biasing is important. 4. Through research mechanism of noise generation; conversion noise and modulation noise analysis, we find: a) Frequency conversion analysis correctly predicts the far-carrier noise behavior of an oscillator, but the oscillator noise floor does not provide results consistent with the physical observations at low-frequency deviations from the carrier; b) In contrast, modulation noise analysis correctly describes the noise behavior of an oscillator at low deviations from the carrier and does not provide results consistent with physical observations at high deviations from the carrier. 5. Through survey VCO noise when combined with the PLL circuit with 7 noise sources, we find the phase noise of VCO when combined with two PLL reduced greatly (phase noise reduction is 8 dB) compared with one PLL (figure 2.23). CHAPTER 3: EXPERIMENTAL RESEARCH 3.1. Power limiter to protect radar receiver 3.1.1. Evaluation leakage power after transceiver switch on radar Amplitude of peak leakage pulse is measured (after 50 dB attenuation coaxial) is 3.5 V. Average leakage power measured in this case is 300 mW. Therefore, with maximum average leakage power is 1000 mW, amplitude of peak pulse is 11.67 V. Amplitude of peak leakage pulse after transceiver switch: 11.67 x 102.5 = 3.69 kV. As mentioned above, LNA only withstand a maximum power less than 20 mW (+13 dBm). LNA works stable in the linear region with the input power of about 0 dBm (approximately 224 mV). Thus, to reduce the peak pulse from 3.69 kV down to 224 mV, the power limiter have limited the reach 84.4 dB. 3.1.2. Simulation of the power limiter by Advance Design System ADS software: The simulation result when low power go to the power limiter (receiver mode) in figure 3.6a, we see through loss less than 1 dB. The simulation result when high power go to the power limiter (transmit mode) in figure 3.6b, we find the limit reached < -91 dB.
13 a. With low power (receiver mode) b. With high power (transmit mode) Figure 3.6: The simulation results of the power limiter. 3.1.3. Actual measured results 3.1.3.1. Measurement in the laboratory: Through loss measurement result as figure 3.7. Through loss measurement result go through of the power limiter shows: + Characteristics of the power limiter shaped as BPF, which is characteristic of passive limiter circuits made on bandwidth filters installed types of interdigital. Cuts outside the working band of the limited is -20 dB at 2 border frequency (2.2 GHz and 3.5 GHz). + Through loss of the band's work restrictions from 1.5 dB to 2.2 dB. This loss rate can compensate by using a combination of LNA which have high Figure 3.7: Through loss measurement result gain (> 25 dB), so it does not reduce the sensitivity of the radar receiver. Measurement methods to assess the limitations of each stage: When you want to test the limits of any stage, we removed the PIN diode and replaced by resistors from 1 to 2 (depending on PIN diode resistor when biased), then measurements of through characteristic of the limiter. The sensitivity recovery time of the power limiter: - Microwave signal is extracted part through 20 dB direction coupler, through the detectors to generation pulse to control active diode. Therefore, the sensitivity recovery time is reduced less than 10 ns (the recovery time of the HP5082-3041 PIN diode [77]) compared with after-slope of excited pulse (figure 3.11);
14 - With the previous solution using the control pulse generator circuit by excited pulse of radar, the sensitivity recovery time is 3µs to 7µs compared with after- slope of excited pulse (figure 3.12). Therefore, the sensitivity recovery time of receiver when using this power limiter faster than the solution using excited pulse of radar. (3 7) s Figure 3.11: Compare pulse input of the Figure 3.12: Compare pulse input of the limiter (blue) and pulse control diode is limiter (blue) and pulse control diode is created from detection circuit (pink). created from excited pulse (pink). On the influence of nonlinearity of PIN diode to the parameters of the radar receiver: Takavar Ghahri Saremi [66] had investigated the nonlinear switching PIN diode limiter and provide the results which 2nd harmonic and 3th harmonic attenuation greatly and nonlinearity of PIN diode do not affect the parameters of the radar receiver. 3.1.3.2. Measurement while working on radar Step 1: Measurement leakage power after transceiver switch. Measurement result is 84 dBm. Calculation limiting level of the power limiter by ADS: Limiting level st of 1 stage: 20.7 dB Power remaining after 1st stage: 84 - 20.7 = 63.3 dBm; nd Limiting level of 2 stage: 30.3 dB Power remaining after 2nd stage: 63.3 - 30.3 dBm = 33 dBm; With power level at input 3th stage is 33 dBm, power remaining after 3th stage (MLP7100 PIN diode) is 18 dBm (see figure 3.4) Limited level of 3th stage 3 is 33 - 18 = 15 dB; Limiting level of 4th stage: 25.3 dB Power remaining after 4th stage (the output of the power limiter) is 18 - 25.3 = -7.3 dBm. Step 2: Measurement power remaining after the power limiter. Measurement result is -8.5 dBm.
15 From the calculated results, simulation and measurement, we can set the table about limiting level for each stage (table 3.2) and the graph compares 3 methods (figure 3.14). Table 3.2: The limiting level (dB) according to three methods. Calculating by (2.6) Simulation Measurement result Average Order Stage (I) (II) (III) (IV) 01 1 22.6 20.7 23 22.1 02 2 28.3 30.3 30.1 29.56667 03 3 15 15 15 15 04 4 25 25.3 25.1 25.13333 = 90.9 91.3 93.2 91.8 Measurement sensitivity evaluation: - Technical specification of the receiver Limiting level of diode stages Mức hạn chế của các tầng điốt 32 sensitivity of cm wave radar: -85 chế (dB) (dB) 31 30 29 28 dB/10 W (or -105 dBm/1 mW); 27 26 Mức hạnlevel 25 (I) 24 (II) 23 - The sensitivity of the receiver when (III) Limiting 22 21 (IV) 20 19 installed UV-99: -105 dBm/1 mW; 18 17 16 15 - The sensitivity of the receiver when Stage no 14 1 2 Tầng 3 4 installed the power limiter combined with Figure 3.14: The graph compares 3 methods. LNA: -113 dBm/1 mW. The sensitivity of the receiver was increased to 8 dB. 3.2. Oscillator using one phase lock loop 3.2.1. The function of the VCO in ground surveillance radar: The microwave oscillator generate oscillations at frequency range from 16.0 to 16.4 GHz, this oscillation was taken to the RF and AFC mixers of the receiver in ground surveillance radar. 3.2.2. Operating principle of the VCO in ground surveillance radar: The VCO of ground surveillance radar included a HMC391LP4 standard oscillator [81] have frequency ranging from 3.9 GHz to 4.45 GHz, stability of oscillation frequency at 4 GHz carried out by the PLL circuit. Then this is the oscillation frequency multiplier with 4 multiplier by HMC370LP4 [80], to have the final output power greater than 10 dBm, use HMC516LC5 semiconductor amplifier [82]. The block Figure 3.15: The block diagram of the VCO.
16 diagram of the VCO shows in figure 3.15. 3.2.3. Actual measured results 3.2.3.1. Spectrum measurement: Oscillation frequency of the VCO can be tuned by electric from 16.0 GHz to 16.4 GHz in the range of the voltage variation of varactor diode from 1.0 V to 2.0 V. 3.2.3.2. Phase noise measurement: Phase noise measurement results of the receiver in ground surveillance radar using the VCO when there is no PLL and PLL circuit shows in figure 3.19. Table 3.5 statistics phase noise of the receiver when there is no PLL and have PLL circuit at 16.27 GHz (IF = 30 MHz). a. No PLL b. PLL Figure 3.19: Phase noise measurement results of the receiver using the VCO when there is no PLL (a) and PLL circuit (b). Table 3.5: Phase noise of the receiver at 16.27 GHz. Frequency offset 100 Hz 1 kHz 10 kHz 100 kHz 1 MHz 10 MHz No PLL (dBc/Hz) -45 -47 -51 -80 -105 -122 PLL (dBc/Hz) -110 -115 -119 -135 -138 -139 3.2.3.3. Measure and evaluate the frequency stability: With measurement system in the laboratory can easily survey the variation of the oscillation frequency over long time. Through the on/off Agilent 82357A interface card, the frequency of the VCO is put into the computer with the frequency sampling of 10 minutes per sample (this value can be changed on request). This data for the survey help us made frequency of the VCO over time (table 3.6). Based on table 3.6, we can draw curve of the frequency stability of the VCO when there is no PLL and PLL circuit as figure 3.21.
17 Table 3.6: Survey the variation of the oscillation frequency over long time. t (minutes) 10 20 30 40 50 60 fVCO (GHz) 16.242150 16.242112 16.242104 16.242180 16.242251 16.242235 fVCO+PLL(GHz) 16.242150 16.242152 16.242145 16.242142 16.242148 16.242175 t (minutes) 70 80 90 100 110 120 fVCO (GHz) 16.242180 16.242120 16.242053 16.242164 16.242158 16.242232 fVCO+PLL(GHz) 16.242152 16.242153 16.242150 16.242145 16.242148 16.242167 t (minutes) 130 140 150 160 170 180 fVCO (GHz) 16.242191 16.242142 16.242207 16.242250 16.242241 16.242124 fVCO+PLL(GHz) 16.242151 16.242150 16.242147 16.242152 16.242153 16.242149 Based on the measurement 16242300 results of frequency and output power 16242250 of the VCO according to the voltage 16242200 16242150 variation of varactor diode, we have 16242100 the following comments: 16242050 + Oscillation frequency of the VCO 16242000 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 [kHz] [x10 minutes] can be tuned by electric from 16.0 f(VCO) f(VCO+PLL) GHz to 16.4 GHz in the range of the Figure 3.21: The frequency stability of the voltage variation of varactor diode VCO when there is no PLL (blue) and PLL circuit (pink). from 1.0 V to 2.0 V, the frequency range corresponding working of ground surveillance radar. + The output power of the VCO achieves greater than 12.2 dBm (16.5 mW) (mixing power go to diode requires greater than 2 mW ). + The frequency stability of the VCO when there is no PLL: 1.22x10-5 and when there is PLL: 0.677x10-6. The frequency stability of the VCO increases 18 times when there is PLL circuit. + Phase noise of the VCO using PLL reduce significantly, at frequency from the carrier frequency of 100 Hz, phase noise reduced to 59 dBc/Hz, this is completely consistent with the theoretical basis and the methode to enhance stability of the VCO which gave in the thesis; + Phase noise of ground surveillance radar when using the VCO and PLL circuit is reduced greatly. Compare two cases, it was found at frequency from the carrier frequency of 100 Hz, phase noise of receiver reduced to 65 dBc/Hz. 3.3. Oscillator using more phase lock loop
18 3.3.1. The function of the LO1 and LO2 oscillators: The LO1 oscillator generate oscillations with high frequency stability and standard amplitude of 1 V at frequency range from 57.75 to 92.75 MHz, through power splitter, this oscillation was taken to the first mixer stage of the receiver and stimulator. The LO2 oscillator generate oscillation with high frequency stability and standard amplitude of 1 V at fixed frequency of 22.6 MHz, through power splitter, this oscillation was taken to the second mixer stage of the receiver and stimulator. 3.3.2. Operating principle of the LO1 and LO2 oscillators f = 57.75 - 75.74 MHz (Band 1) Figure 3.22 shows the LO1/1 f = 75.75 - 92.75 MHz (Band 2) LO1/2 LO1/3 LO1/4 LO2/1 f = 22.6 MHz LO2/2 LO2/3 LO2/4 block diagram of the local LO2 splitter synthesizer. It consists of five LO1 splitter single PLL loops: one loop for Switch Amplifier RS-232 Amplifier External reference standard crystal oscillator, three LO1-1 (main): loops for the 1st LO1 and one + (750.75 - 984.62) MHz; Program 130 kHz step Pretune loop + (757.5 - 927.5) MHz; (3.25 MHz External/ divider (13 Loop filter LO2 loop 100 kHz step step) Internal or 10) loop for the 2nd LO2. The Micro- processor LO1-2 Main loop frequency standard of the + (741.0 - 968.5) MHz; 6.5 MHz step + (747.5 - 915.5) MHz; Mixer IF Stage (130 or 100 kHz step) 26 MHz Reference loop TCXO 6 MHz step synthesizer is a 10 MHz TCXO, f = 9.75 - 16.12 MHz (Band 1) f = 10 - 12 MHz (Band 2) External loop Control a low noise crystal oscillator is (6.5 MHz or 6 MHz step) 26 MHz synchronized with it, this loop Figure 3.22: The block diagram called the REF loop. When the of receiver local synthesizer. microprocessor sends a frequency command out, the AUX loop locks first. It supports the down-mixing signal for the MAIN loop. After it, the PRETUNE loop tunes coarsely the LO1-1 of the MAIN loop. There is a frequency mixer in the MAIN loop, the RF signal is from AUX loop, the LO signal is from the PRETUNE loop. The MAIN and the PRETUNE loops work in master-slave configuration, after the pre-tuning procedure the PRETUNE loop goes to tristate (sleep) and the main loop phase detector is locking on the IF signal. A switch changes the time-constant of the loop filter and the locking procedure ends. Detailed diagram of local oscillator LO1 and LO2 is presented in figure 3.23. 3.3.3. The receiver of VHF radar: The receiver is designed and manufactured including the main blocks: four independent channels are designed and manufactured to be the same; LO1 and LO2 block; stimulation block; block of generation and control emission pulse. Figure 3.26 is a block diagram of a channel receiver for VHF radar.