CONG NGHE VIEN THONG<br />
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THIET KE T H U A T TOAN<br />
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KASUMI TREN FPGA<br />
TRONG BAO M A T<br />
THONG TIN DI DONG<br />
ThS. Tran Hoang Vu<br />
<br />
dung he thdng ngay tren chinh cMp dd.<br />
Giaiphapsu'dungthuattoan bao matKasumi<br />
tren cong nghe FPGA (Field-Programmable Lmh kien FPGA cho phdp cau hinh lai de thay<br />
Gate Array) la phu'dng phap bao mat thong ddi chire nang logic trong kM vin dang nim trong<br />
tin dude thiet ke tren phan ciyng, nhim bao he thdng. Kha nang nay cho phdp riha tMet ke cd<br />
mat thong tin tdt hdn giai phap bao mat du!a the dd dang thay doi chite nang phan cimg gidng<br />
tren phan mem. nhu dang thuc Men tren phan mem. Tham cM FPGA<br />
Giai phap thitc hien la nghien ciyu thuat cdn cd the tu ddng eau hinh de thue Men cae chire<br />
toan Kasumi de thiet ke chudng trinh bao nang khac nhau trong rihirng khoang thdi gian khac<br />
mat thdng tin di dgng (TTDD) tren cd sd li'ng nhau. Kha nang cho phdp cau hinh lai chiic nang<br />
dung cong nghe FPGA. Viec thitc nghiem logic ed the img dung trong nMeu kieu he thdng de<br />
dude tien hanh dung ngdn ngiyiap trinh phan eai dat he thdng tu khic phuc loi, tao he thdng ed<br />
Cling Verilog de viet chudng trinh thitc hien the dugc cau Mnh cho nMeu mdi trudng boat ddng,<br />
ma hoa Kasumi trong bao mat TTDD. Sau do hoac eai dat thanh phan cimg da muc dich cho cae<br />
dung phan mem ModelSIM de thitc hien mo ling diing khac nhau. Hon niia, sii dung FPGA lam<br />
phdng thuat toan bao mat Kasumi. cho de tMet ke va kiem tra phan cimg ciing nhu kha<br />
nang nhanh chdng tung san pham ra thi trudng.<br />
G I O I THIEU CONG NGHE FPGA Cho den nay, nMeu nha tMet ke da su dung FPGA<br />
de eai dat tren ciing mdt phan cimg ea thuat toan<br />
Nhdm eac mach tich hgp dugc biet den vdi eai ten<br />
ma hoa khoa cdng khai dimg trong tao va thay ddi<br />
Unh kien logic lap trinh dugc (PLD) hay Mang eac<br />
khoa phien va thuat toan khoa bi mat truyen thdng<br />
cdng lap trinh dugc (FPGA) cho phep ngudi tMet ke<br />
dimg trong ma hoa dii Ueu ngudi diing [1].<br />
cau hinh cho nd cM trong vai giay, va mdi FPGA cd<br />
the tMet ke de thuc Men cac chire nang hoan toan Ben canh thdi gian de tMet ke va phat trien ngin<br />
khac nhau. Sd lan cau hinh lai cua FPGA la khdng hon, linh kien FPGA cdn cho phdp kha nang che tao<br />
gidi ban, do dd cd the ngMen cim, phat trien va ling cac bang mach miu ciing nhu cac giai phap gia re.<br />
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TAP CHI CNTT&TT KY 1 (11.2009) 37<br />
CONG NGHE V I E N THONG<br />
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Tham chi ddi vdi ca cac he thdng dang cd gia thanh vdi nhau thdng qua mang cac dudng dinh hudng va<br />
rat cao tM cac nha san xuat FPGA ciing cd the cung toan bd kien tnic logic nay ket ndi vdi the gidi ben<br />
cap cdng cu va kha nang xu ly de cd the chuyen ngoai qua eac cdng vao/ra lap trinh dugc. Trong eac<br />
tMet ke sang cac Unh kien lap trinh dugc nay. cMp FPGA the he mdi nhat, ngoai cac thanh phan<br />
Khoi RAM nbirna CO ban nhu tren, cdn dugc nhiing them rat nMeu<br />
Khoi I/O<br />
khdi Chile nang tien Uen khac, ed the ke den nhu<br />
Khdi RAM cd dung lugng Idn, bd Nhan cMa cho cac<br />
Lien ket cau hinh<br />
duoc img dung DSP, eac bd Vi xu ly nhimg 8 bit, 32 bit<br />
Bp nhan chia ldi mem va tham cM ea bd Vi xu ly cimg ciing dupe<br />
Khoi Logic cau nhung trong FPGA. Hinh 1 trinh bay cau tnic tong<br />
hinh dugc (CIB)<br />
quat cac thanh phan trong mot FPGA cdn Hinh 2<br />
trinh bay eau tnic chung ciia mdt CLB, mdi CLB bao<br />
Kiea tnic Chip FPGA<br />
Quan !)• dong ho gdm bdn sUee ket ndi tdi ma tran chuyen mach.<br />
(DCM. BLTG)<br />
Dii Ueu cau Mnh cho FPGA dupe nap vao eac d<br />
H inh 1. Cau true co ban cua FPGA<br />
nhd dac biet ben trong cMp de tuy chpn ehuc nang<br />
Ddi vdi cac nha thiet ke cMp bao mat di ddng, eiia nd. FPGA ed the dpe dii Ueu cau Mnh cua nd tir<br />
FPGA cho phdp tMet ke he thdng mdt each mem bd nhd PROM ngoai thdng qua cdng ndi tiep hoac<br />
deo nhat. Kien tnic bao mat cd the dugc thii nghiem song song (che dd master), hoac dugc nap tii tMet<br />
vdi ma hoa khdi hoac ma xoin, vdi nhieu kieu ham hi khac ben ngoai (che dp ngoai vi hay slave), cac<br />
bam, thay ddi giao dien vdi CPU chinh de ed the nha san xuat Unh kien FPGA ciing eung cap cdng cu<br />
phan tich va danh gia Meu nang eua he thdng. Ung phin mem manh, hd trp nMeu each thiet ke khac<br />
dung thue te dugc nap true tiep vao FPGA va cd the nhau, tii ve so dd cho den md ta boat ddng, may<br />
thay ngay cac hoat ddng cua nd. Quyet dinh eudi trang thai, md phdng, dat va Uen ket cac khdi chire<br />
ciing khdng cdn la tren co sd cam tinh, hay chi la nang de tao, nap vao cMp va dge nguge tro lai ludng<br />
md phdng tren phin mem ma hoan toan theo hieu bit eau Mnh cho cMp.<br />
nang thue cua cac thanh phan tMch hgp. KM eau Mnh lai cMp, chire nang cua cac CLB va<br />
Cau tnic ben ttong cua FPGA bao gdm hang ngan Uen ket giiia chimg do dd ciing thay ddi theo, lam<br />
khdi logic da nang, hay cdn ggi la Khdi logic cau cho mach ed ehuc nang hoan toan mdi. Moi CLB ed<br />
hirih dugc (CLE) dugc tMet ke va sip xep mdt each the cau Mnh tharih hai che dd - logic hoac lam bd<br />
mem deo vdi kien tnic kha trinh. cac CLB Uen ket rihd.<br />
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OOJT COUT<br />
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A<br />
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L J T — Carry<br />
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^•J ?<br />
Hinh 2. Cau true slice trong FPGA<br />
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I 38 I TAP CHI CNTT&TT KY 1 (11.2009)<br />
CONG NGHE VIEN THONG<br />
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Hinh 3: Cau triic chung thuat toan KASUMI<br />
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THUAT TOAN KASUMI<br />
mdt khdi FL FI (HUih 3d) la khdi pM tiiyen 16 bit,<br />
tu nd ciing ed cau tnic Feistel bdn vdng, FI bao gdm<br />
KASUMI (HUih 3b) la thuat toan ma hoa khdi khoa<br />
hai khdi thay ddi (S-box) 9 bit va hai khdi thay doi<br />
ddi ximg hg MISTY do tap doan MitsubisM Electromc<br />
7 bit. Hinh 3d cM ra rang du Ueu qua ham FI theo<br />
ngMen cim va phat trien. Sau dd dugc ESTI phat<br />
hai dudng khac nhau, dudng 'day' cd 9 bit va dudng<br />
trien thanh tieu chuan ma hoa qude te dimg cho<br />
mong ed 7 bit. Chii y la trong eau tnic Feistel nhu<br />
he thdng TTDD the he Ba W-CDMA [6]. Mue dich co<br />
sit dung trong tMet ke nay, mdi vdng ed diu ra deu<br />
ban la nham tMet ke thuat toan cd kha nang bao<br />
dugc xoay chieu trudc kM dua tdi dau vao cua vdng<br />
mat chdng lai cac cude tan cdng tuyen tinh va ca<br />
tiep theo. Sau kM hoan thanh du tam vdng theo<br />
pM tuyen, nhd ggn (sii dung it cdng logic ding nhu<br />
thuat toan KASUMI, dau ra cudi cimg chinh la khoi<br />
cdng suat tieu thu it), va de dang eai dat vdi Meu<br />
dir Ueu da ma hoa tuong img vdi khdi dii Ueu a dau<br />
nang cao ea tren phan cimg ciing nhu phan mem<br />
vao [8].<br />
[2].<br />
Thuat toan KASUMI khac rihau theo vdng chin<br />
le, trong cac vdng le ham eua vdng dugc tinh bing<br />
each lay ket qua tinh dugc tii ham FL (Hinh 3a) dat<br />
vao ham FO (Hinh 3c), cdn trong cac vdng chin tM<br />
nguge lai, ket qua trudc het dugc tinh ttong FO va<br />
sau dd dugc dua tdi FL. FL la ham 32 bit cM bao gdm<br />
cac cdng AND, OR, NOT cimg vdi chire nang quay<br />
trai. Ham FO ciing la mdt ham 32 bit nhung phiic<br />
tap hon, cd cau tnic Feistel ba vdng, mdi vdng ehiia<br />
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TAP CHI CNTT&TT KY 1 (11.2009) 39<br />
CONG NGHE VIEN THONG<br />
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GIAI PHAP T H I E T KE THUAT TOAN<br />
KASUMI<br />
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Kasumi 2R Block<br />
l_DATA[63;01<br />
Kasumi Round Block<br />
l_KEY [127:0]<br />
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LKASUMI_EN Kasumi FO Block<br />
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Kasumi FI Block<br />
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Kasumi_ Keygen<br />
Kasumi_ FL Block<br />
Block Kasumi_ S9 Kasumi_ S7<br />
Block Block<br />
O_DATAtS3:01<br />
M<br />
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Hinh 4. So do khdi thiet ke tong thi khoi Kasumi<br />
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Tir so dd tMet ke tong the khdi Kasumi (HUih 4) ta vu cho viec xay dung thuat toan 19 dam bao tinh<br />
xay dung so dd cM tiet bing ngdn ngii md ta phan toan ven dir Ueu va thuat toan 18 dam bao tinh tm<br />
cimg Verilog de thire Men viec ma hda dii Ueu phuc cay cua thdng tin [3].<br />
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I_KASUM1_EN 1_CLK l_RESET_l<br />
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I ftOUND_DOMe I CLI<br />
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il Register I<br />
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tizr :eiKii I \ L£MUX / «<br />
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ENCODER KASUMI ROUND<br />
[127 :01 K03<br />
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I CLK ROUND_Da»4e<br />
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1:<br />
0_RD_DATA<br />
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Hinh 5: So do thiet ke chi tiet tong the khdi Kasumi<br />
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40 TAP CHi CNTT&TT KY 1 ( 1 1 . 2 0 0 9 )<br />
CONG NGHE V I E N THONG<br />
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CHU'ONG TRINH MO PHONG THUAT # Key Uiit 00000000000000000000000000000<br />
TOAN KASUMI 00000000000000000000000000000000000000<br />
00000000000000000000000000000000000000<br />
Su dung chuong tririh md phdng ModelSIM kiem<br />
00000000000000000010111<br />
tra boat ddng cua ma hda KASUMI<br />
Nhap dir Ueu ma hda 64 bit vao Ket qua sau kM di qua khdi ma hda KASUMI<br />
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# Data Uiput 000000000000000000000000000 # Data decode from Core design 101001011100<br />
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0000000000000000000000000000000111000 0011100011101101011110011lOOOOOI111000<br />
01110010010010<br />
Nhap khda k 128 bit vao<br />
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mugij Uto<br />
Hinh 6: Ket qua chay mo phong ma Kasumi<br />
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Tai lieu t h a m khao Wireless security, McGraw-Hill<br />
<br />
[1]. TS. NGUY£N VAN CUDNG (2005), Be tai nghien cuu [5]. ROGER J. SUTTON (2002), Secure Communications:<br />
khoa hoc cap to Nghien cuu ung dung cong nghe ASIC, Dai hoc Applications and Management<br />
Da Nang [61.KEIJITACHIKAWA, JOHN WILEY & Sons (2002), W-CDMA:<br />
[21. TS.NGUYEN PHAM ANH DUNG (2004), Thong tin di dong Mobile Communications System<br />
meheSa, NXBBuudign [7]. FLAVIO MURATORE, JOHN WILEY & Sons (2001), UMTS<br />
[31. T 6 N G VAN ON (2007), Thiet ke mach sd vol VHDL Mobile Communication for the Future<br />
&Verilog, NXB Lao dpng xa hoi [8]. TOMAS BALDERAS-Ck)ntreras Rene A. Cumplido-Pan-a<br />
[41. RANDALL K. NICHOLS, PANOS C. LEKKAS (2002), (2004), Security Archltectwe In UMTS Third Generation Cellular<br />
Networks, National Instltudeof Optical and Electronic, Mexico<br />
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TAP CHI CNTT&TT KY 1 ( 1 1 . 2 0 0 9 ) 41<br />